Kinetis SDK v.1.3 API Reference Manual
Rev. 0
Freescale Semiconductor, Inc.
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#include "fsl_device_registers.h"
#include <stdint.h>
#include <stdbool.h>
Macros | |
#define | LMEM_CACHE_LINE_SIZE 0x10 |
LMEM CACHE Line Size in bytes. More... | |
Enumerations | |
enum | lmem_cache_status_t { kStatus_LMEM_CACHE_Success = 0, kStatus_LMEM_CACHE_Busy, kStatus_LMEM_CACHE_DemoteError, kStatus_LMEM_CACHE_Error } |
Error codes for the LMEM CACHE driver. More... | |
enum | lmem_cache_mode_t { kCacheNonCacheable = 0x0U, kCacheWriteThrough = 0x2U, kCacheWriteBack = 0x3U } |
LMEM CACHE mode options. More... | |
enum | lmem_cache_region_t { kCacheRegion0 = 0U, kCacheRegion1 = 1U, kCacheRegion2 = 2U, kCacheRegion3 = 3U, kCacheRegion4 = 4U, kCacheRegion5 = 5U, kCacheRegion6 = 6U, kCacheRegion7 = 7U, kCacheRegion8 = 8U, kCacheRegion9 = 9U, kCacheRegion10 = 10U, kCacheRegion11 = 11U, kCacheRegion12 = 12U, kCacheRegion13 = 13U, kCacheRegion14 = 14U, kCacheRegion15 = 15U } |
LMEM CACHE Regions. More... | |
enum | lmem_cache_line_command_t { kCacheLineSearchReadOrWrite = 0U, kCacheLineInvalidate = 1U, kCacheLinePush = 2U, kCacheLineClear = 3U } |
LMEM CACHE line command. More... | |
Functions | |
Processor Code Bus Cache Control | |
static void | LMEM_HAL_SetCodeCacheEnableCmd (LMEM_Type *base, bool enable) |
Enables or disables the Processor Code bus cache and write buffer. More... | |
void | LMEM_HAL_SetCodeCacheInvalidateAllCmd (LMEM_Type *base, bool enable) |
Enable or disable the Processor Code bus option to invalidate all lines. More... | |
void | LMEM_HAL_SetCodeCachePushAllCmd (LMEM_Type *base, bool enable) |
Enable or disable the Processor Code bus option to push all modified lines. More... | |
void | LMEM_HAL_SetCodeCacheClearAllCmd (LMEM_Type *base, bool enable) |
Enable or disable the Processor Code bus option to push and invalidate all modified lines. More... | |
static void | LMEM_HAL_InitiateCodeCacheCommand (LMEM_Type *base) |
Initiate the Processor Code bus cache command. More... | |
static bool | LMEM_HAL_IsCodeCacheCommandActive (LMEM_Type *base) |
Returns whether or not the Processor Code bus cache command is in progress. More... | |
static void | LMEM_HAL_InitiateCodeCacheLineCommand (LMEM_Type *base) |
Initiate the Processor Code bus cache line command. More... | |
static bool | LMEM_HAL_IsCodeCacheLineCommandActive (LMEM_Type *base) |
Returns whether or not the Processor Code bus cache line command is in progress. More... | |
static void | LMEM_HAL_SetCodeCacheLineCommand (LMEM_Type *base, lmem_cache_line_command_t command) |
Sets the cache line command for the Processor Code bus. More... | |
static void | LMEM_HAL_SetCodeCachePhysicalAddr (LMEM_Type *base, uint32_t addr) |
Sets the physical address for cache line commands for the Processor Code bus. More... | |
void | LMEM_HAL_SetCodeCacheRegionMode (LMEM_Type *base, lmem_cache_region_t region, lmem_cache_mode_t cacheMode) |
Sets the cache mode for a specific region for the Processor Code bus. More... | |
uint32_t | LMEM_HAL_GetCodeCacheRegionMode (LMEM_Type *base, lmem_cache_region_t region) |
Gets the current cache mode for a specific region for the Processor Code bus. More... | |