Kinetis SDK v.1.3 API Reference Manual
Rev. 0
Freescale Semiconductor, Inc.
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#include "fsl_sim_hal.h"
Macros | |
#define | FSL_SIM_SCGC_BIT(SCGCx, n) (((SCGCx-1U)<<5U) + n) |
SIM SCGC bit index. More... | |
Enumerations | |
enum | clock_wdog_src_t { kClockWdogSrcLpoClk, kClockWdogSrcOsc32kClk, kClockWdogSrcMcgIrClk, kClockWdogSrcEr32kClk, kClockWdogSrcLpoClk, kClockWdogSrcAltClk, kClockWdogSrcLpoClk, kClockWdogSrcAltClk, kClockWdogSrcLpoClk, kClockWdogSrcAltClk, kClockWdogSrcLpoClk, kClockWdogSrcAltClk, kClockWdogSrcLpoClk, kClockWdogSrcAltClk } |
WDOG clock source select. More... | |
enum | clock_trace_src_t { kClockTraceSrcMcgoutClk, kClockTraceSrcCoreClk, kClockTraceSrcMcgoutClk, kClockTraceSrcCoreClk, kClockTraceSrcMcgoutClk, kClockTraceSrcCoreClk, kClockTraceSrcMcgoutClk, kClockTraceSrcCoreClk, kClockTraceSrcMcgoutClk, kClockTraceSrcCoreClk } |
Debug trace clock source select. More... | |
enum | clock_nanoedge_clk2x_src { kClockNanoedgeSrcMcgPllClk, kClockNanoedgeSrcMcgPllClk2x, kClockNanoedgeSrcMcgPllClk, kClockNanoedgeSrcMcgPllClk2x, kClockNanoedgeSrcMcgPllClk, kClockNanoedgeSrcMcgPllClk2x, kClockNanoedgeSrcMcgPllClk, kClockNanoedgeSrcMcgPllClk2x, kClockNanoedgeSrcMcgPllClk, kClockNanoedgeSrcMcgPllClk2x } |
Debug trace clock source select. More... | |
enum | sim_osc32k_clock_sel_t { kSimOsc32kSelOsc32k, kSimOsc32kSelReserved, kSimOsc32kSelReserved1, kSimOsc32kSelLpo, kSimOsc32kSelOsc32k, kSimOsc32kSelReserved, kSimOsc32kSelReserved1, kSimOsc32kSelLpo, kSimOsc32kSelOsc32k, kSimOsc32kSelReserved, kSimOsc32kSelReserved1, kSimOsc32kSelLpo, kSimOsc32kSelOsc32k, kSimOsc32kSelReserved, kSimOsc32kSelReserved1, kSimOsc32kSelLpo, kSimOsc32kSelOsc32k, kSimOsc32kSelReserved, kSimOsc32kSelReserved1, kSimOsc32kSelLpo } |
SIM OSC32KSEL clock source select. | |
enum | sim_nanoedge_clock_sel_t { kSimNanoEdgeMcgPllClk, kSimNanoEdgeMcgPll2xClk, kSimNanoEdgeMcgPllClk, kSimNanoEdgeMcgPll2xClk, kSimNanoEdgeMcgPllClk, kSimNanoEdgeMcgPll2xClk, kSimNanoEdgeMcgPllClk, kSimNanoEdgeMcgPll2xClk, kSimNanoEdgeMcgPllClk, kSimNanoEdgeMcgPll2xClk } |
SIM NANOEDGECLK2XSEL clock source select. | |
enum | sim_trace_clock_sel_t { kSimTraceMcgoutClk, kSimTraceCoreClk, kSimTraceMcgoutClk, kSimTraceCoreClk, kSimTraceMcgoutClk, kSimTraceCoreClk, kSimTraceMcgoutClk, kSimTraceCoreClk, kSimTraceMcgoutClk, kSimTraceCoreClk } |
SIM TRACECLKSEL clock source select. | |
enum | sim_clkout_clock_sel_t { kSimClkoutReserved, kSimClkoutReserved1, kSimClkoutFlashClk, kSimClkoutLpoClk, kSimClkoutMcgIrcClk, kSimClkoutOscErcClkUndiv, kSimClkoutOscErcClk, kSimClkoutReserved, kSimClkoutReserved1, kSimClkoutFlashClk, kSimClkoutLpoClk, kSimClkoutMcgIrcClk, kSimClkoutOscErcClkUndiv, kSimClkoutOscErcClk, kSimClkoutReserved, kSimClkoutReserved1, kSimClkoutFlashClk, kSimClkoutLpoClk, kSimClkoutMcgIrcClk, kSimClkoutOscErcClkUndiv, kSimClkoutOscErcClk, kSimClkoutReserved, kSimClkoutReserved1, kSimClkoutFlashClk, kSimClkoutLpoClk, kSimClkoutMcgIrcClk, kSimClkoutOscErcClkUndiv, kSimClkoutOscErcClk, kSimClkoutReserved, kSimClkoutReserved1, kSimClkoutFlashClk, kSimClkoutLpoClk, kSimClkoutMcgIrcClk, kSimClkoutOscErcClkUndiv, kSimClkoutOscErcClk } |
SIM CLKOUT_SEL clock source select. | |
enum | sim_adcb_trg_sel_t { kSimAdcbTrgSelHighSpeedComp0 = 1U, kSimAdcbTrgSelHighSpeedComp1 = 2U, kSimAdcbTrgSelHighSpeedComp2 = 3U, kSimAdcbTrgSelPit0 = 4U, kSimAdcbTrgSelPit1 = 5U, kSimAdcbTrgSelPit2 = 6U, kSimAdcbTrgSelPit3 = 7U, kSimAdcbTrgSelFtm0 = 8U, kSimAdcbTrgSelFtm1 = 9U, kSimAdcbTrgSelFtm3 = 11U, kSimAdcbTrgSelxbaraout41 = 12U, kSimAdcbTrgSelLptimer = 14U, kSimAdcbTrgSelHighSpeedComp0 = 1U, kSimAdcbTrgSelHighSpeedComp1 = 2U, kSimAdcbTrgSelHighSpeedComp2 = 3U, kSimAdcbTrgSelPit0 = 4U, kSimAdcbTrgSelPit1 = 5U, kSimAdcbTrgSelPit2 = 6U, kSimAdcbTrgSelPit3 = 7U, kSimAdcbTrgSelFtm0 = 8U, kSimAdcbTrgSelFtm1 = 9U, kSimAdcbTrgSelFtm3 = 11U, kSimAdcbTrgSelxbaraout41 = 12U, kSimAdcbTrgSelLptimer = 14U, kSimAdcbTrgSelHighSpeedComp0 = 1U, kSimAdcbTrgSelHighSpeedComp1 = 2U, kSimAdcbTrgSelHighSpeedComp2 = 3U, kSimAdcbTrgSelPit0 = 4U, kSimAdcbTrgSelPit1 = 5U, kSimAdcbTrgSelPit2 = 6U, kSimAdcbTrgSelPit3 = 7U, kSimAdcbTrgSelFtm0 = 8U, kSimAdcbTrgSelFtm1 = 9U, kSimAdcbTrgSelFtm3 = 11U, kSimAdcbTrgSelxbaraout41 = 12U, kSimAdcbTrgSelLptimer = 14U, kSimAdcbTrgSelHighSpeedComp0 = 1U, kSimAdcbTrgSelHighSpeedComp1 = 2U, kSimAdcbTrgSelHighSpeedComp2 = 3U, kSimAdcbTrgSelPit0 = 4U, kSimAdcbTrgSelPit1 = 5U, kSimAdcbTrgSelPit2 = 6U, kSimAdcbTrgSelPit3 = 7U, kSimAdcbTrgSelFtm0 = 8U, kSimAdcbTrgSelFtm1 = 9U, kSimAdcbTrgSelFtm3 = 11U, kSimAdcbTrgSelxbaraout41 = 12U, kSimAdcbTrgSelLptimer = 14U, kSimAdcbTrgSelHighSpeedComp0 = 1U, kSimAdcbTrgSelHighSpeedComp1 = 2U, kSimAdcbTrgSelHighSpeedComp2 = 3U, kSimAdcbTrgSelPit0 = 4U, kSimAdcbTrgSelPit1 = 5U, kSimAdcbTrgSelPit2 = 6U, kSimAdcbTrgSelPit3 = 7U, kSimAdcbTrgSelFtm0 = 8U, kSimAdcbTrgSelFtm1 = 9U, kSimAdcbTrgSelFtm3 = 11U, kSimAdcbTrgSelxbaraout41 = 12U, kSimAdcbTrgSelLptimer = 14U } |
SIM ADCB trigger select. | |
enum | sim_adc_trg_sel_t { kSimAdcTrgselExt = 0U, kSimAdcTrgSelComp0 = 1U, kSimAdcTrgSelReserved = 2U, kSimAdcTrgSelReserved1 = 3U, kSimAdcTrgSelPit0 = 4U, kSimAdcTrgSelPit1 = 5U, kSimAdcTrgSelReserved2 = 6U, kSimAdcTrgSelReserved3 = 7U, kSimAdcTrgSelTpm0 = 8U, kSimAdcTrgSelTpm1 = 9U, kSimAdcTrgSelTpm2 = 10U, kSimAdcTrgSelReserved4 = 11U, kSimAdcTrgSelRtcAlarm = 12U, kSimAdcTrgSelRtcSec = 13U, kSimAdcTrgSelLptimer = 14U, kSimAdcTrgSelReserved5 = 15U, kSimAdcTrgselExt = 0U, kSimAdcTrgSelComp0 = 1U, kSimAdcTrgSelReserved = 2U, kSimAdcTrgSelReserved1 = 3U, kSimAdcTrgSelPit0 = 4U, kSimAdcTrgSelPit1 = 5U, kSimAdcTrgSelReserved2 = 6U, kSimAdcTrgSelReserved3 = 7U, kSimAdcTrgSelTpm0 = 8U, kSimAdcTrgSelTpm1 = 9U, kSimAdcTrgSelTpm2 = 10U, kSimAdcTrgSelReserved4 = 11U, kSimAdcTrgSelRtcAlarm = 12U, kSimAdcTrgSelRtcSec = 13U, kSimAdcTrgSelLptimer = 14U, kSimAdcTrgSelReserved5 = 15U, kSimAdcTrgselExt = 0U, kSimAdcTrgSelComp0 = 1U, kSimAdcTrgSelReserved = 2U, kSimAdcTrgSelReserved1 = 3U, kSimAdcTrgSelPit0 = 4U, kSimAdcTrgSelPit1 = 5U, kSimAdcTrgSelReserved2 = 6U, kSimAdcTrgSelReserved3 = 7U, kSimAdcTrgSelTpm0 = 8U, kSimAdcTrgSelTpm1 = 9U, kSimAdcTrgSelTpm2 = 10U, kSimAdcTrgSelReserved4 = 11U, kSimAdcTrgSelRtcAlarm = 12U, kSimAdcTrgSelRtcSec = 13U, kSimAdcTrgSelLptimer = 14U, kSimAdcTrgSelReserved5 = 15U, kSimAdcTrgselExt = 0U, kSimAdcTrgSelComp0 = 1U, kSimAdcTrgSelReserved = 2U, kSimAdcTrgSelReserved1 = 3U, kSimAdcTrgSelPit0 = 4U, kSimAdcTrgSelPit1 = 5U, kSimAdcTrgSelReserved2 = 6U, kSimAdcTrgSelReserved3 = 7U, kSimAdcTrgSelTpm0 = 8U, kSimAdcTrgSelTpm1 = 9U, kSimAdcTrgSelTpm2 = 10U, kSimAdcTrgSelReserved4 = 11U, kSimAdcTrgSelRtcAlarm = 12U, kSimAdcTrgSelRtcSec = 13U, kSimAdcTrgSelLptimer = 14U, kSimAdcTrgSelReserved5 = 15U, kSimAdcTrgselPdb0Ext = 0U, kSimAdcTrgSelHighSpeedComp0 = 1U, kSimAdcTrgSelHighSpeedComp1 = 2U, kSimAdcTrgSelHighSpeedComp2 = 3U, kSimAdcTrgSelPit0 = 4U, kSimAdcTrgSelPit1 = 5U, kSimAdcTrgSelPit2 = 6U, kSimAdcTrgSelPit3 = 7U, kSimAdcTrgSelFtm0 = 8U, kSimAdcTrgSelFtm1 = 9U, kSimAdcTrgSelFtm3 = 11U, kSimAdcTrgSelxbaraout = 12U, kSimAdcTrgSelLptimer = 14U, kSimAdcTrgselPdb0Ext = 0U, kSimAdcTrgSelHighSpeedComp0 = 1U, kSimAdcTrgSelHighSpeedComp1 = 2U, kSimAdcTrgSelHighSpeedComp2 = 3U, kSimAdcTrgSelPit0 = 4U, kSimAdcTrgSelPit1 = 5U, kSimAdcTrgSelPit2 = 6U, kSimAdcTrgSelPit3 = 7U, kSimAdcTrgSelFtm0 = 8U, kSimAdcTrgSelFtm1 = 9U, kSimAdcTrgSelFtm3 = 11U, kSimAdcTrgSelxbaraout = 12U, kSimAdcTrgSelLptimer = 14U, kSimAdcTrgselPdb0Ext = 0U, kSimAdcTrgSelHighSpeedComp0 = 1U, kSimAdcTrgSelHighSpeedComp1 = 2U, kSimAdcTrgSelHighSpeedComp2 = 3U, kSimAdcTrgSelPit0 = 4U, kSimAdcTrgSelPit1 = 5U, kSimAdcTrgSelPit2 = 6U, kSimAdcTrgSelPit3 = 7U, kSimAdcTrgSelFtm0 = 8U, kSimAdcTrgSelFtm1 = 9U, kSimAdcTrgSelFtm3 = 11U, kSimAdcTrgSelxbaraout = 12U, kSimAdcTrgSelLptimer = 14U, kSimAdcTrgselPdb0Ext = 0U, kSimAdcTrgSelHighSpeedComp0 = 1U, kSimAdcTrgSelHighSpeedComp1 = 2U, kSimAdcTrgSelHighSpeedComp2 = 3U, kSimAdcTrgSelPit0 = 4U, kSimAdcTrgSelPit1 = 5U, kSimAdcTrgSelPit2 = 6U, kSimAdcTrgSelPit3 = 7U, kSimAdcTrgSelFtm0 = 8U, kSimAdcTrgSelFtm1 = 9U, kSimAdcTrgSelFtm3 = 11U, kSimAdcTrgSelxbaraout = 12U, kSimAdcTrgSelLptimer = 14U, kSimAdcTrgselPdb0Ext = 0U, kSimAdcTrgSelHighSpeedComp0 = 1U, kSimAdcTrgSelHighSpeedComp1 = 2U, kSimAdcTrgSelHighSpeedComp2 = 3U, kSimAdcTrgSelPit0 = 4U, kSimAdcTrgSelPit1 = 5U, kSimAdcTrgSelPit2 = 6U, kSimAdcTrgSelPit3 = 7U, kSimAdcTrgSelFtm0 = 8U, kSimAdcTrgSelFtm1 = 9U, kSimAdcTrgSelFtm3 = 11U, kSimAdcTrgSelxbaraout = 12U, kSimAdcTrgSelLptimer = 14U } |
SIM ADC trigger select. | |
enum | sim_cadc_conv_id_t { kSimCAdcConvA = 0U, kSimCAdcConvB = 1U, kSimCAdcConvA = 0U, kSimCAdcConvB = 1U, kSimCAdcConvA = 0U, kSimCAdcConvB = 1U, kSimCAdcConvA = 0U, kSimCAdcConvB = 1U, kSimCAdcConvA = 0U, kSimCAdcConvB = 1U } |
Defines the type of enumerating ADC converter's ID. More... | |
enum | sim_adc_alt_trg_en { kSimAdcTrgenXbarout = 0U, kSimAdcTrgenPdb = 1U, kSimAdcTrgenalt0 = 2U, kSimAdcTrgenalt1 = 3U, kSimAdcTrgenXbarout = 0U, kSimAdcTrgenPdb = 1U, kSimAdcTrgenalt0 = 2U, kSimAdcTrgenalt1 = 3U, kSimAdcTrgenXbarout = 0U, kSimAdcTrgenPdb = 1U, kSimAdcTrgenalt0 = 2U, kSimAdcTrgenalt1 = 3U, kSimAdcTrgenXbarout = 0U, kSimAdcTrgenPdb = 1U, kSimAdcTrgenalt0 = 2U, kSimAdcTrgenalt1 = 3U, kSimAdcTrgenXbarout = 0U, kSimAdcTrgenPdb = 1U, kSimAdcTrgenalt0 = 2U, kSimAdcTrgenalt1 = 3U } |
SIM ADC alternate trigger enable. | |
enum | sim_dac_hw_trg_sel { kSimDacHwTrgSelXbarout15 = 0U, kSimDacHwTrgSelPdb01Int = 1U, kSimDacHwTrgSelPdb0Int = 2U, kSimDacHwTrgSelPdb1Int = 3U, kSimDacHwTrgSelXbarout15 = 0U, kSimDacHwTrgSelPdb01Int = 1U, kSimDacHwTrgSelPdb0Int = 2U, kSimDacHwTrgSelPdb1Int = 3U, kSimDacHwTrgSelXbarout15 = 0U, kSimDacHwTrgSelPdb01Int = 1U, kSimDacHwTrgSelPdb0Int = 2U, kSimDacHwTrgSelPdb1Int = 3U, kSimDacHwTrgSelXbarout15 = 0U, kSimDacHwTrgSelPdb01Int = 1U, kSimDacHwTrgSelPdb0Int = 2U, kSimDacHwTrgSelPdb1Int = 3U, kSimDacHwTrgSelXbarout15 = 0U, kSimDacHwTrgSelPdb01Int = 1U, kSimDacHwTrgSelPdb0Int = 2U, kSimDacHwTrgSelPdb1Int = 3U } |
DAC0 Hardware Trigger Input Source. | |
enum | sim_ewm_in_src { kSimDacHwTrgSelXbarout58 = 0U, kSimDacHwTrgSelEwnInPin = 1U, kSimDacHwTrgSelXbarout58 = 0U, kSimDacHwTrgSelEwnInPin = 1U, kSimDacHwTrgSelXbarout58 = 0U, kSimDacHwTrgSelEwnInPin = 1U, kSimDacHwTrgSelXbarout58 = 0U, kSimDacHwTrgSelEwnInPin = 1U, kSimDacHwTrgSelXbarout58 = 0U, kSimDacHwTrgSelEwnInPin = 1U } |
the ewm_in source of EWM module. More... | |
enum | sim_cmp_win_in_src { kSimCmpWinInSrcXbarout = 0U, kSimCmpWinInSrcPdb01Int = 1U, kSimCmpWinInSrcPdb0Int = 2U, kSimCmpWinInSrcPdb1Int = 3U, kSimCmpWinInSrcXbarout = 0U, kSimCmpWinInSrcPdb01Int = 1U, kSimCmpWinInSrcPdb0Int = 2U, kSimCmpWinInSrcPdb1Int = 3U, kSimCmpWinInSrcXbarout = 0U, kSimCmpWinInSrcPdb01Int = 1U, kSimCmpWinInSrcPdb0Int = 2U, kSimCmpWinInSrcPdb1Int = 3U, kSimCmpWinInSrcXbarout = 0U, kSimCmpWinInSrcPdb01Int = 1U, kSimCmpWinInSrcPdb0Int = 2U, kSimCmpWinInSrcPdb1Int = 3U, kSimCmpWinInSrcXbarout = 0U, kSimCmpWinInSrcPdb01Int = 1U, kSimCmpWinInSrcPdb0Int = 2U, kSimCmpWinInSrcPdb1Int = 3U } |
CMP Sample/Window Input X Source. | |
enum | clock_lptmr_src_t { kClockLptmrSrcMcgIrClk, kClockLptmrSrcLpoClk, kClockLptmrSrcEr32kClk, kClockLptmrSrcOsc0erClk, kClockLptmrSrcMcgIrClk, kClockLptmrSrcLpoClk, kClockLptmrSrcEr32kClk, kClockLptmrSrcOsc0erClk, kClockLptmrSrcMcgIrClk, kClockLptmrSrcLpoClk, kClockLptmrSrcEr32kClk, kClockLptmrSrcOsc0erClk, kClockLptmrSrcMcgIrClk, kClockLptmrSrcLpoClk, kClockLptmrSrcEr32kClk, kClockLptmrSrcOsc0erClk, kClockLptmrSrcMcgIrClk, kClockLptmrSrcLpoClk, kClockLptmrSrcEr32kClk, kClockLptmrSrcOsc0erClk, kClockLptmrSrcMcgIrClk, kClockLptmrSrcLpoClk, kClockLptmrSrcEr32kClk, kClockLptmrSrcOsc0erClkUndiv, kClockLptmrSrcMcgIrClk, kClockLptmrSrcLpoClk, kClockLptmrSrcEr32kClk, kClockLptmrSrcOsc0erClkUndiv, kClockLptmrSrcMcgIrClk, kClockLptmrSrcLpoClk, kClockLptmrSrcEr32kClk, kClockLptmrSrcOsc0erClkUndiv, kClockLptmrSrcMcgIrClk, kClockLptmrSrcLpoClk, kClockLptmrSrcEr32kClk, kClockLptmrSrcOsc0erClkUndiv, kClockLptmrSrcMcgIrClk, kClockLptmrSrcLpoClk, kClockLptmrSrcEr32kClk, kClockLptmrSrcOsc0erClkUndiv } |
LPTMR clock source select. More... | |
enum | clock_er32k_src_t { kClockEr32kSrcOsc0 = 0U, kClockEr32kSrcReserved = 1U, kClockEr32kSrcRtc = 2U, kClockEr32kSrcLpo = 3U, kClockEr32kSrcOsc0 = 0U, kClockEr32kSrcReserved = 1U, kClockEr32kSrcRtc = 2U, kClockEr32kSrcLpo = 3U, kClockEr32kSrcOsc0 = 0U, kClockEr32kSrcReserved = 1U, kClockEr32kSrcRtc = 2U, kClockEr32kSrcLpo = 3U, kClockEr32kSrcOsc0 = 0U, kClockEr32kSrcReserved = 1U, kClockEr32kSrcRtc = 2U, kClockEr32kSrcLpo = 3U, kClockEr32kSrcOsc32kClk = 0U, kClockEr32kSrcEr32kClk = 1U, kClockEr32kSrcMcgIrClk = 2U, kClockEr32kSrcLpo = 3U, kClockEr32kSrcOsc0 = 0U, kClockEr32kSrcLpo = 3U, kClockEr32kSrcOsc0 = 0U, kClockEr32kSrcLpo = 3U, kClockEr32kSrcOsc0 = 0U, kClockEr32kSrcLpo = 3U, kClockEr32kSrcOsc0 = 0U, kClockEr32kSrcLpo = 3U, kClockEr32kSrcOsc0 = 0U, kClockEr32kSrcLpo = 3U } |
SIM external reference clock source select (OSC32KSEL). More... | |
enum | clock_flexcan_src_t { kClockFlexcanSrcOsc0erClk, kClockFlexcanSrcBusClk, kClockFlexcanSrcOsc0erClk, kClockFlexcanSrcBusClk, kClockFlexcanSrcOsc0erClk, kClockFlexcanSrcBusClk, kClockFlexcanSrcOsc0erClk, kClockFlexcanSrcBusClk, kClockFlexcanSrcOsc0erClk, kClockFlexcanSrcBusClk } |
FLEXCAN clock source select. More... | |
enum | sim_clock_gate_name_t { kSimClockGateI2c0 = FSL_SIM_SCGC_BIT(4U, 6U), kSimClockGateI2c1 = FSL_SIM_SCGC_BIT(4U, 7U), kSimClockGateLpsci0 = FSL_SIM_SCGC_BIT(4U, 10U), kSimClockGateUart1 = FSL_SIM_SCGC_BIT(4U, 11U), kSimClockGateUart2 = FSL_SIM_SCGC_BIT(4U, 12U), kSimClockGateUsbfs0 = FSL_SIM_SCGC_BIT(4U, 18U), kSimClockGateCmp0 = FSL_SIM_SCGC_BIT(4U, 19U), kSimClockGateSpi0 = FSL_SIM_SCGC_BIT(4U, 22U), kSimClockGateSpi1 = FSL_SIM_SCGC_BIT(4U, 23U), kSimClockGateLptmr0 = FSL_SIM_SCGC_BIT(5U, 0U), kSimClockGateTsi0 = FSL_SIM_SCGC_BIT(5U, 5U), kSimClockGatePortA = FSL_SIM_SCGC_BIT(5U, 9U), kSimClockGatePortB = FSL_SIM_SCGC_BIT(5U, 10U), kSimClockGatePortC = FSL_SIM_SCGC_BIT(5U, 11U), kSimClockGatePortD = FSL_SIM_SCGC_BIT(5U, 12U), kSimClockGatePortE = FSL_SIM_SCGC_BIT(5U, 13U), kSimClockGateFtf0 = FSL_SIM_SCGC_BIT(6U, 0U), kSimClockGateDmamux0 = FSL_SIM_SCGC_BIT(6U, 1U), kSimClockGatePit0 = FSL_SIM_SCGC_BIT(6U, 23U), kSimClockGateTpm0 = FSL_SIM_SCGC_BIT(6U, 24U), kSimClockGateTpm1 = FSL_SIM_SCGC_BIT(6U, 25U), kSimClockGateTpm2 = FSL_SIM_SCGC_BIT(6U, 26U), kSimClockGateAdc0 = FSL_SIM_SCGC_BIT(6U, 27U), kSimClockGateRtc0 = FSL_SIM_SCGC_BIT(6U, 29U), kSimClockGateDac0 = FSL_SIM_SCGC_BIT(6U, 31U), kSimClockGateDma0 = FSL_SIM_SCGC_BIT(7U, 8U), kSimClockGateI2c0 = FSL_SIM_SCGC_BIT(4U, 6U), kSimClockGateI2c1 = FSL_SIM_SCGC_BIT(4U, 7U), kSimClockGateLpsci0 = FSL_SIM_SCGC_BIT(4U, 10U), kSimClockGateUart1 = FSL_SIM_SCGC_BIT(4U, 11U), kSimClockGateUart2 = FSL_SIM_SCGC_BIT(4U, 12U), kSimClockGateUsbfs0 = FSL_SIM_SCGC_BIT(4U, 18U), kSimClockGateCmp0 = FSL_SIM_SCGC_BIT(4U, 19U), kSimClockGateSpi0 = FSL_SIM_SCGC_BIT(4U, 22U), kSimClockGateSpi1 = FSL_SIM_SCGC_BIT(4U, 23U), kSimClockGateLptmr0 = FSL_SIM_SCGC_BIT(5U, 0U), kSimClockGateTsi0 = FSL_SIM_SCGC_BIT(5U, 5U), kSimClockGatePortA = FSL_SIM_SCGC_BIT(5U, 9U), kSimClockGatePortB = FSL_SIM_SCGC_BIT(5U, 10U), kSimClockGatePortC = FSL_SIM_SCGC_BIT(5U, 11U), kSimClockGatePortD = FSL_SIM_SCGC_BIT(5U, 12U), kSimClockGatePortE = FSL_SIM_SCGC_BIT(5U, 13U), kSimClockGateFtf0 = FSL_SIM_SCGC_BIT(6U, 0U), kSimClockGateDmamux0 = FSL_SIM_SCGC_BIT(6U, 1U), kSimClockGatePit0 = FSL_SIM_SCGC_BIT(6U, 23U), kSimClockGateTpm0 = FSL_SIM_SCGC_BIT(6U, 24U), kSimClockGateTpm1 = FSL_SIM_SCGC_BIT(6U, 25U), kSimClockGateTpm2 = FSL_SIM_SCGC_BIT(6U, 26U), kSimClockGateAdc0 = FSL_SIM_SCGC_BIT(6U, 27U), kSimClockGateRtc0 = FSL_SIM_SCGC_BIT(6U, 29U), kSimClockGateDac0 = FSL_SIM_SCGC_BIT(6U, 31U), kSimClockGateDma0 = FSL_SIM_SCGC_BIT(7U, 8U), kSimClockGateI2c0 = FSL_SIM_SCGC_BIT(4U, 6U), kSimClockGateI2c1 = FSL_SIM_SCGC_BIT(4U, 7U), kSimClockGateLpsci0 = FSL_SIM_SCGC_BIT(4U, 10U), kSimClockGateUart1 = FSL_SIM_SCGC_BIT(4U, 11U), kSimClockGateUart2 = FSL_SIM_SCGC_BIT(4U, 12U), kSimClockGateUsbfs0 = FSL_SIM_SCGC_BIT(4U, 18U), kSimClockGateCmp0 = FSL_SIM_SCGC_BIT(4U, 19U), kSimClockGateSpi0 = FSL_SIM_SCGC_BIT(4U, 22U), kSimClockGateSpi1 = FSL_SIM_SCGC_BIT(4U, 23U), kSimClockGateLptmr0 = FSL_SIM_SCGC_BIT(5U, 0U), kSimClockGateTsi0 = FSL_SIM_SCGC_BIT(5U, 5U), kSimClockGatePortA = FSL_SIM_SCGC_BIT(5U, 9U), kSimClockGatePortB = FSL_SIM_SCGC_BIT(5U, 10U), kSimClockGatePortC = FSL_SIM_SCGC_BIT(5U, 11U), kSimClockGatePortD = FSL_SIM_SCGC_BIT(5U, 12U), kSimClockGatePortE = FSL_SIM_SCGC_BIT(5U, 13U), kSimClockGateFtf0 = FSL_SIM_SCGC_BIT(6U, 0U), kSimClockGateDmamux0 = FSL_SIM_SCGC_BIT(6U, 1U), kSimClockGatePit0 = FSL_SIM_SCGC_BIT(6U, 23U), kSimClockGateTpm0 = FSL_SIM_SCGC_BIT(6U, 24U), kSimClockGateTpm1 = FSL_SIM_SCGC_BIT(6U, 25U), kSimClockGateTpm2 = FSL_SIM_SCGC_BIT(6U, 26U), kSimClockGateAdc0 = FSL_SIM_SCGC_BIT(6U, 27U), kSimClockGateRtc0 = FSL_SIM_SCGC_BIT(6U, 29U), kSimClockGateDac0 = FSL_SIM_SCGC_BIT(6U, 31U), kSimClockGateDma0 = FSL_SIM_SCGC_BIT(7U, 8U), kSimClockGateI2c0 = FSL_SIM_SCGC_BIT(4U, 6U), kSimClockGateI2c1 = FSL_SIM_SCGC_BIT(4U, 7U), kSimClockGateLpsci0 = FSL_SIM_SCGC_BIT(4U, 10U), kSimClockGateUart1 = FSL_SIM_SCGC_BIT(4U, 11U), kSimClockGateUart2 = FSL_SIM_SCGC_BIT(4U, 12U), kSimClockGateUsbfs0 = FSL_SIM_SCGC_BIT(4U, 18U), kSimClockGateCmp0 = FSL_SIM_SCGC_BIT(4U, 19U), kSimClockGateSpi0 = FSL_SIM_SCGC_BIT(4U, 22U), kSimClockGateSpi1 = FSL_SIM_SCGC_BIT(4U, 23U), kSimClockGateLptmr0 = FSL_SIM_SCGC_BIT(5U, 0U), kSimClockGateTsi0 = FSL_SIM_SCGC_BIT(5U, 5U), kSimClockGatePortA = FSL_SIM_SCGC_BIT(5U, 9U), kSimClockGatePortB = FSL_SIM_SCGC_BIT(5U, 10U), kSimClockGatePortC = FSL_SIM_SCGC_BIT(5U, 11U), kSimClockGatePortD = FSL_SIM_SCGC_BIT(5U, 12U), kSimClockGatePortE = FSL_SIM_SCGC_BIT(5U, 13U), kSimClockGateFtf0 = FSL_SIM_SCGC_BIT(6U, 0U), kSimClockGateDmamux0 = FSL_SIM_SCGC_BIT(6U, 1U), kSimClockGatePit0 = FSL_SIM_SCGC_BIT(6U, 23U), kSimClockGateTpm0 = FSL_SIM_SCGC_BIT(6U, 24U), kSimClockGateTpm1 = FSL_SIM_SCGC_BIT(6U, 25U), kSimClockGateTpm2 = FSL_SIM_SCGC_BIT(6U, 26U), kSimClockGateAdc0 = FSL_SIM_SCGC_BIT(6U, 27U), kSimClockGateRtc0 = FSL_SIM_SCGC_BIT(6U, 29U), kSimClockGateDac0 = FSL_SIM_SCGC_BIT(6U, 31U), kSimClockGateDma0 = FSL_SIM_SCGC_BIT(7U, 8U), kSimClockGateEwm0 = FSL_SIM_SCGC_BIT(4U, 1U), kSimClockGateI2c0 = FSL_SIM_SCGC_BIT(4U, 7U), kSimClockGateI2c1 = FSL_SIM_SCGC_BIT(4U, 8U), kSimClockGateUart0 = FSL_SIM_SCGC_BIT(4U, 10U), kSimClockGateUart1 = FSL_SIM_SCGC_BIT(4U, 11U), kSimClockGateUart2 = FSL_SIM_SCGC_BIT(4U, 12U), kSimClockGateUart3 = FSL_SIM_SCGC_BIT(4U, 13U), kSimClockGateVref0 = FSL_SIM_SCGC_BIT(4U, 15U), kSimClockGateCmp0 = FSL_SIM_SCGC_BIT(4U, 18U), kSimClockGateSpi0 = FSL_SIM_SCGC_BIT(4U, 21U), kSimClockGateSpi1 = FSL_SIM_SCGC_BIT(4U, 22U), kSimClockGateSlcd0 = FSL_SIM_SCGC_BIT(5U, 3U), kSimClockGatePortA = FSL_SIM_SCGC_BIT(5U, 6U), kSimClockGatePortB = FSL_SIM_SCGC_BIT(5U, 7U), kSimClockGatePortC = FSL_SIM_SCGC_BIT(5U, 8U), kSimClockGatePortD = FSL_SIM_SCGC_BIT(5U, 9U), kSimClockGatePortE = FSL_SIM_SCGC_BIT(5U, 10U), kSimClockGatePortF = FSL_SIM_SCGC_BIT(5U, 11U), kSimClockGatePortG = FSL_SIM_SCGC_BIT(5U, 12U), kSimClockGatePortH = FSL_SIM_SCGC_BIT(5U, 13U), kSimClockGatePortI = FSL_SIM_SCGC_BIT(5U, 14U), kSimClockGateIRtc0 = FSL_SIM_SCGC_BIT(5U, 16U), kSimClockGateIRtcRegFile0 = FSL_SIM_SCGC_BIT(5U, 17U), kSimClockGateXbar0 = FSL_SIM_SCGC_BIT(5U, 21U), kSimClockGateQuadTmr0 = FSL_SIM_SCGC_BIT(5U, 23U), kSimClockGateQuadTmr1 = FSL_SIM_SCGC_BIT(5U, 24U), kSimClockGateQuadTmr2 = FSL_SIM_SCGC_BIT(5U, 25U), kSimClockGateQuadTmr3 = FSL_SIM_SCGC_BIT(5U, 26U), kSimClockGateFtf0 = FSL_SIM_SCGC_BIT(6U, 0U), kSimClockGateDmamux0 = FSL_SIM_SCGC_BIT(6U, 1U), kSimClockGateRnga0 = FSL_SIM_SCGC_BIT(6U, 9U), kSimClockGateLpuart0 = FSL_SIM_SCGC_BIT(6U, 10U), kSimClockGateAdc0 = FSL_SIM_SCGC_BIT(6U, 11U), kSimClockGatePit0 = FSL_SIM_SCGC_BIT(6U, 13U), kSimClockGatePit1 = FSL_SIM_SCGC_BIT(6U, 14U), kSimClockGateAfe0 = FSL_SIM_SCGC_BIT(6U, 16U), kSimClockGateCrc0 = FSL_SIM_SCGC_BIT(6U, 20U), kSimClockGatePdb0 = FSL_SIM_SCGC_BIT(6U, 22U), kSimClockGatePortJ = FSL_SIM_SCGC_BIT(6U, 23U), kSimClockGatePortK = FSL_SIM_SCGC_BIT(6U, 24U), kSimClockGatePortL = FSL_SIM_SCGC_BIT(6U, 25U), kSimClockGatePortM = FSL_SIM_SCGC_BIT(6U, 26U), kSimClockGateLptmr0 = FSL_SIM_SCGC_BIT(6U, 28U), kSimClockGateMpu0 = FSL_SIM_SCGC_BIT(7U, 0U), kSimClockGateDma0 = FSL_SIM_SCGC_BIT(7U, 1U), kSimClockGateCau0 = FSL_SIM_SCGC_BIT(7U, 2U), kSimClockGateMmau0 = FSL_SIM_SCGC_BIT(7U, 3U), kSimClockGateEwm0 = FSL_SIM_SCGC_BIT(4U, 1U), kSimClockGateI2c0 = FSL_SIM_SCGC_BIT(4U, 6U), kSimClockGateUart0 = FSL_SIM_SCGC_BIT(4U, 10U), kSimClockGateUart1 = FSL_SIM_SCGC_BIT(4U, 11U), kSimClockGateCmp = FSL_SIM_SCGC_BIT(4U, 19U), kSimClockGatePwm0 = FSL_SIM_SCGC_BIT(4U, 24U), kSimClockGatePwm1 = FSL_SIM_SCGC_BIT(4U, 25U), kSimClockGatePwm2 = FSL_SIM_SCGC_BIT(4U, 26U), kSimClockGatePwm3 = FSL_SIM_SCGC_BIT(4U, 27U), kSimClockGateLptmr0 = FSL_SIM_SCGC_BIT(5U, 0U), kSimClockGatePortA = FSL_SIM_SCGC_BIT(5U, 9U), kSimClockGatePortB = FSL_SIM_SCGC_BIT(5U, 10U), kSimClockGatePortC = FSL_SIM_SCGC_BIT(5U, 11U), kSimClockGatePortD = FSL_SIM_SCGC_BIT(5U, 12U), kSimClockGatePortE = FSL_SIM_SCGC_BIT(5U, 13U), kSimClockGateEnc0 = FSL_SIM_SCGC_BIT(5U, 21U), kSimClockGateXbarA = FSL_SIM_SCGC_BIT(5U, 25U), kSimClockGateXbarB = FSL_SIM_SCGC_BIT(5U, 26U), kSimClockGateAoi0 = FSL_SIM_SCGC_BIT(5U, 27U), kSimClockGateAdc0 = FSL_SIM_SCGC_BIT(5U, 28U), kSimClockGateFtf0 = FSL_SIM_SCGC_BIT(6U, 0U), kSimClockGateDmamux0 = FSL_SIM_SCGC_BIT(6U, 1U), kSimClockGateFlexcan0 = FSL_SIM_SCGC_BIT(6U, 4U), kSimClockGateFlexcan1 = FSL_SIM_SCGC_BIT(6U, 5U), kSimClockGateFtm3 = FSL_SIM_SCGC_BIT(6U, 6U), kSimClockGateSpi0 = FSL_SIM_SCGC_BIT(6U, 12U), kSimClockGatePdb1 = FSL_SIM_SCGC_BIT(6U, 17U), kSimClockGateCrc0 = FSL_SIM_SCGC_BIT(6U, 18U), kSimClockGatePdb0 = FSL_SIM_SCGC_BIT(6U, 22U), kSimClockGatePit0 = FSL_SIM_SCGC_BIT(6U, 23U), kSimClockGateFtm0 = FSL_SIM_SCGC_BIT(6U, 24U), kSimClockGateFtm1 = FSL_SIM_SCGC_BIT(6U, 25U), kSimClockGateDac0 = FSL_SIM_SCGC_BIT(6U, 31U), kSimClockGateDma0 = FSL_SIM_SCGC_BIT(7U, 8U), kSimClockGateEwm0 = FSL_SIM_SCGC_BIT(4U, 1U), kSimClockGateI2c0 = FSL_SIM_SCGC_BIT(4U, 6U), kSimClockGateUart0 = FSL_SIM_SCGC_BIT(4U, 10U), kSimClockGateUart1 = FSL_SIM_SCGC_BIT(4U, 11U), kSimClockGateCmp = FSL_SIM_SCGC_BIT(4U, 19U), kSimClockGatePwm0 = FSL_SIM_SCGC_BIT(4U, 24U), kSimClockGatePwm1 = FSL_SIM_SCGC_BIT(4U, 25U), kSimClockGatePwm2 = FSL_SIM_SCGC_BIT(4U, 26U), kSimClockGatePwm3 = FSL_SIM_SCGC_BIT(4U, 27U), kSimClockGateLptmr0 = FSL_SIM_SCGC_BIT(5U, 0U), kSimClockGatePortA = FSL_SIM_SCGC_BIT(5U, 9U), kSimClockGatePortB = FSL_SIM_SCGC_BIT(5U, 10U), kSimClockGatePortC = FSL_SIM_SCGC_BIT(5U, 11U), kSimClockGatePortD = FSL_SIM_SCGC_BIT(5U, 12U), kSimClockGatePortE = FSL_SIM_SCGC_BIT(5U, 13U), kSimClockGateEnc0 = FSL_SIM_SCGC_BIT(5U, 21U), kSimClockGateXbarA = FSL_SIM_SCGC_BIT(5U, 25U), kSimClockGateXbarB = FSL_SIM_SCGC_BIT(5U, 26U), kSimClockGateAoi0 = FSL_SIM_SCGC_BIT(5U, 27U), kSimClockGateAdc0 = FSL_SIM_SCGC_BIT(5U, 28U), kSimClockGateFtf0 = FSL_SIM_SCGC_BIT(6U, 0U), kSimClockGateDmamux0 = FSL_SIM_SCGC_BIT(6U, 1U), kSimClockGateFlexcan0 = FSL_SIM_SCGC_BIT(6U, 4U), kSimClockGateFlexcan1 = FSL_SIM_SCGC_BIT(6U, 5U), kSimClockGateFtm3 = FSL_SIM_SCGC_BIT(6U, 6U), kSimClockGateSpi0 = FSL_SIM_SCGC_BIT(6U, 12U), kSimClockGatePdb1 = FSL_SIM_SCGC_BIT(6U, 17U), kSimClockGateCrc0 = FSL_SIM_SCGC_BIT(6U, 18U), kSimClockGatePdb0 = FSL_SIM_SCGC_BIT(6U, 22U), kSimClockGatePit0 = FSL_SIM_SCGC_BIT(6U, 23U), kSimClockGateFtm0 = FSL_SIM_SCGC_BIT(6U, 24U), kSimClockGateFtm1 = FSL_SIM_SCGC_BIT(6U, 25U), kSimClockGateDac0 = FSL_SIM_SCGC_BIT(6U, 31U), kSimClockGateDma0 = FSL_SIM_SCGC_BIT(7U, 8U), kSimClockGateEwm0 = FSL_SIM_SCGC_BIT(4U, 1U), kSimClockGateI2c0 = FSL_SIM_SCGC_BIT(4U, 6U), kSimClockGateUart0 = FSL_SIM_SCGC_BIT(4U, 10U), kSimClockGateUart1 = FSL_SIM_SCGC_BIT(4U, 11U), kSimClockGateCmp = FSL_SIM_SCGC_BIT(4U, 19U), kSimClockGatePwm0 = FSL_SIM_SCGC_BIT(4U, 24U), kSimClockGatePwm1 = FSL_SIM_SCGC_BIT(4U, 25U), kSimClockGatePwm2 = FSL_SIM_SCGC_BIT(4U, 26U), kSimClockGatePwm3 = FSL_SIM_SCGC_BIT(4U, 27U), kSimClockGateLptmr0 = FSL_SIM_SCGC_BIT(5U, 0U), kSimClockGatePortA = FSL_SIM_SCGC_BIT(5U, 9U), kSimClockGatePortB = FSL_SIM_SCGC_BIT(5U, 10U), kSimClockGatePortC = FSL_SIM_SCGC_BIT(5U, 11U), kSimClockGatePortD = FSL_SIM_SCGC_BIT(5U, 12U), kSimClockGatePortE = FSL_SIM_SCGC_BIT(5U, 13U), kSimClockGateEnc0 = FSL_SIM_SCGC_BIT(5U, 21U), kSimClockGateXbarA = FSL_SIM_SCGC_BIT(5U, 25U), kSimClockGateXbarB = FSL_SIM_SCGC_BIT(5U, 26U), kSimClockGateAoi0 = FSL_SIM_SCGC_BIT(5U, 27U), kSimClockGateAdc0 = FSL_SIM_SCGC_BIT(5U, 28U), kSimClockGateFtf0 = FSL_SIM_SCGC_BIT(6U, 0U), kSimClockGateDmamux0 = FSL_SIM_SCGC_BIT(6U, 1U), kSimClockGateFlexcan0 = FSL_SIM_SCGC_BIT(6U, 4U), kSimClockGateFlexcan1 = FSL_SIM_SCGC_BIT(6U, 5U), kSimClockGateFtm3 = FSL_SIM_SCGC_BIT(6U, 6U), kSimClockGateSpi0 = FSL_SIM_SCGC_BIT(6U, 12U), kSimClockGatePdb1 = FSL_SIM_SCGC_BIT(6U, 17U), kSimClockGateCrc0 = FSL_SIM_SCGC_BIT(6U, 18U), kSimClockGatePdb0 = FSL_SIM_SCGC_BIT(6U, 22U), kSimClockGatePit0 = FSL_SIM_SCGC_BIT(6U, 23U), kSimClockGateFtm0 = FSL_SIM_SCGC_BIT(6U, 24U), kSimClockGateFtm1 = FSL_SIM_SCGC_BIT(6U, 25U), kSimClockGateDac0 = FSL_SIM_SCGC_BIT(6U, 31U), kSimClockGateDma0 = FSL_SIM_SCGC_BIT(7U, 8U), kSimClockGateEwm0 = FSL_SIM_SCGC_BIT(4U, 1U), kSimClockGateI2c0 = FSL_SIM_SCGC_BIT(4U, 6U), kSimClockGateUart0 = FSL_SIM_SCGC_BIT(4U, 10U), kSimClockGateUart1 = FSL_SIM_SCGC_BIT(4U, 11U), kSimClockGateCmp = FSL_SIM_SCGC_BIT(4U, 19U), kSimClockGatePwm0 = FSL_SIM_SCGC_BIT(4U, 24U), kSimClockGatePwm1 = FSL_SIM_SCGC_BIT(4U, 25U), kSimClockGatePwm2 = FSL_SIM_SCGC_BIT(4U, 26U), kSimClockGatePwm3 = FSL_SIM_SCGC_BIT(4U, 27U), kSimClockGateLptmr0 = FSL_SIM_SCGC_BIT(5U, 0U), kSimClockGatePortA = FSL_SIM_SCGC_BIT(5U, 9U), kSimClockGatePortB = FSL_SIM_SCGC_BIT(5U, 10U), kSimClockGatePortC = FSL_SIM_SCGC_BIT(5U, 11U), kSimClockGatePortD = FSL_SIM_SCGC_BIT(5U, 12U), kSimClockGatePortE = FSL_SIM_SCGC_BIT(5U, 13U), kSimClockGateEnc0 = FSL_SIM_SCGC_BIT(5U, 21U), kSimClockGateXbarA = FSL_SIM_SCGC_BIT(5U, 25U), kSimClockGateXbarB = FSL_SIM_SCGC_BIT(5U, 26U), kSimClockGateAoi0 = FSL_SIM_SCGC_BIT(5U, 27U), kSimClockGateAdc0 = FSL_SIM_SCGC_BIT(5U, 28U), kSimClockGateFtf0 = FSL_SIM_SCGC_BIT(6U, 0U), kSimClockGateDmamux0 = FSL_SIM_SCGC_BIT(6U, 1U), kSimClockGateFlexcan0 = FSL_SIM_SCGC_BIT(6U, 4U), kSimClockGateFlexcan1 = FSL_SIM_SCGC_BIT(6U, 5U), kSimClockGateFtm3 = FSL_SIM_SCGC_BIT(6U, 6U), kSimClockGateSpi0 = FSL_SIM_SCGC_BIT(6U, 12U), kSimClockGatePdb1 = FSL_SIM_SCGC_BIT(6U, 17U), kSimClockGateCrc0 = FSL_SIM_SCGC_BIT(6U, 18U), kSimClockGatePdb0 = FSL_SIM_SCGC_BIT(6U, 22U), kSimClockGatePit0 = FSL_SIM_SCGC_BIT(6U, 23U), kSimClockGateFtm0 = FSL_SIM_SCGC_BIT(6U, 24U), kSimClockGateFtm1 = FSL_SIM_SCGC_BIT(6U, 25U), kSimClockGateDac0 = FSL_SIM_SCGC_BIT(6U, 31U), kSimClockGateDma0 = FSL_SIM_SCGC_BIT(7U, 8U), kSimClockGateEwm0 = FSL_SIM_SCGC_BIT(4U, 1U), kSimClockGateI2c0 = FSL_SIM_SCGC_BIT(4U, 6U), kSimClockGateUart0 = FSL_SIM_SCGC_BIT(4U, 10U), kSimClockGateUart1 = FSL_SIM_SCGC_BIT(4U, 11U), kSimClockGateCmp = FSL_SIM_SCGC_BIT(4U, 19U), kSimClockGatePwm0 = FSL_SIM_SCGC_BIT(4U, 24U), kSimClockGatePwm1 = FSL_SIM_SCGC_BIT(4U, 25U), kSimClockGatePwm2 = FSL_SIM_SCGC_BIT(4U, 26U), kSimClockGatePwm3 = FSL_SIM_SCGC_BIT(4U, 27U), kSimClockGateLptmr0 = FSL_SIM_SCGC_BIT(5U, 0U), kSimClockGatePortA = FSL_SIM_SCGC_BIT(5U, 9U), kSimClockGatePortB = FSL_SIM_SCGC_BIT(5U, 10U), kSimClockGatePortC = FSL_SIM_SCGC_BIT(5U, 11U), kSimClockGatePortD = FSL_SIM_SCGC_BIT(5U, 12U), kSimClockGatePortE = FSL_SIM_SCGC_BIT(5U, 13U), kSimClockGateEnc0 = FSL_SIM_SCGC_BIT(5U, 21U), kSimClockGateXbarA = FSL_SIM_SCGC_BIT(5U, 25U), kSimClockGateXbarB = FSL_SIM_SCGC_BIT(5U, 26U), kSimClockGateAoi0 = FSL_SIM_SCGC_BIT(5U, 27U), kSimClockGateAdc0 = FSL_SIM_SCGC_BIT(5U, 28U), kSimClockGateFtf0 = FSL_SIM_SCGC_BIT(6U, 0U), kSimClockGateDmamux0 = FSL_SIM_SCGC_BIT(6U, 1U), kSimClockGateFlexcan0 = FSL_SIM_SCGC_BIT(6U, 4U), kSimClockGateFlexcan1 = FSL_SIM_SCGC_BIT(6U, 5U), kSimClockGateFtm3 = FSL_SIM_SCGC_BIT(6U, 6U), kSimClockGateSpi0 = FSL_SIM_SCGC_BIT(6U, 12U), kSimClockGatePdb1 = FSL_SIM_SCGC_BIT(6U, 17U), kSimClockGateCrc0 = FSL_SIM_SCGC_BIT(6U, 18U), kSimClockGatePdb0 = FSL_SIM_SCGC_BIT(6U, 22U), kSimClockGatePit0 = FSL_SIM_SCGC_BIT(6U, 23U), kSimClockGateFtm0 = FSL_SIM_SCGC_BIT(6U, 24U), kSimClockGateFtm1 = FSL_SIM_SCGC_BIT(6U, 25U), kSimClockGateDac0 = FSL_SIM_SCGC_BIT(6U, 31U), kSimClockGateDma0 = FSL_SIM_SCGC_BIT(7U, 8U) } |
Clock gate name used for SIM_HAL_EnableClock/SIM_HAL_DisableClock. More... | |
enum | clock_source_names_t { kClockNfcSrc, kClockEsdhcSrc, kClockSdhcSrc, kClockLcdcSrc, kClockTimeSrc, kClockRmiiSrc, kClockUsbfSrc, kClockUsbSrc, kClockUsbhSrc, kClockUart0Src, kClockLpuartSrc, kClockTpmSrc, kClockOsc32kSel, kClockUsbfSel, kClockPllfllSel, kClockNfcSel, kClockLcdcSel, kClockTraceSel, kClockClkoutSel, kClockRtcClkoutSel, kClockNanoEdgeClk2xSel, kClockSourceMax, kClockNfcSrc, kClockEsdhcSrc, kClockSdhcSrc, kClockLcdcSrc, kClockTimeSrc, kClockRmiiSrc, kClockUsbfSrc, kClockUsbSrc, kClockUsbhSrc, kClockUart0Src, kClockLpuartSrc, kClockTpmSrc, kClockOsc32kSel, kClockUsbfSel, kClockPllfllSel, kClockNfcSel, kClockLcdcSel, kClockTraceSel, kClockClkoutSel, kClockRtcClkoutSel, kClockNanoEdgeClk2xSel, kClockSourceMax, kClockNfcSrc, kClockEsdhcSrc, kClockSdhcSrc, kClockLcdcSrc, kClockTimeSrc, kClockRmiiSrc, kClockUsbfSrc, kClockUsbSrc, kClockUsbhSrc, kClockUart0Src, kClockLpuartSrc, kClockTpmSrc, kClockOsc32kSel, kClockUsbfSel, kClockPllfllSel, kClockNfcSel, kClockLcdcSel, kClockTraceSel, kClockClkoutSel, kClockRtcClkoutSel, kClockNanoEdgeClk2xSel, kClockSourceMax, kClockNfcSrc, kClockEsdhcSrc, kClockSdhcSrc, kClockLcdcSrc, kClockTimeSrc, kClockRmiiSrc, kClockUsbfSrc, kClockUsbSrc, kClockUsbhSrc, kClockUart0Src, kClockLpuartSrc, kClockTpmSrc, kClockOsc32kSel, kClockUsbfSel, kClockPllfllSel, kClockNfcSel, kClockLcdcSel, kClockTraceSel, kClockClkoutSel, kClockRtcClkoutSel, kClockNanoEdgeClk2xSel, kClockSourceMax, kClockNfcSrc, kClockEsdhcSrc, kClockSdhcSrc, kClockLcdcSrc, kClockTimeSrc, kClockRmiiSrc, kClockUsbfSrc, kClockUsbSrc, kClockUsbhSrc, kClockUart0Src, kClockLpuartSrc, kClockTpmSrc, kClockOsc32kSel, kClockUsbfSel, kClockPllfllSel, kClockNfcSel, kClockLcdcSel, kClockTraceSel, kClockClkoutSel, kClockRtcClkoutSel, kClockNanoEdgeClk2xSel, kClockSourceMax } |
Clock source and sel names. | |
enum | clock_divider_names_t { kClockDividerOutdiv1, kClockDividerOutdiv2, kClockDividerOutdiv3, kClockDividerOutdiv4, kClockDividerUsbFrac, kClockDividerUsbDiv, kClockDividerUsbfsFrac, kClockDividerUsbfsDiv, kClockDividerUsbhsFrac, kClockDividerUsbhsDiv, kClockDividerLcdcFrac, kClockDividerLcdcDiv, kClockDividerNfcFrac, kClockDividerNfcDiv, kClockDividerSpecial1, kClockDividerMax, kClockDividerOutdiv1, kClockDividerOutdiv2, kClockDividerOutdiv3, kClockDividerOutdiv4, kClockDividerUsbFrac, kClockDividerUsbDiv, kClockDividerUsbfsFrac, kClockDividerUsbfsDiv, kClockDividerUsbhsFrac, kClockDividerUsbhsDiv, kClockDividerLcdcFrac, kClockDividerLcdcDiv, kClockDividerNfcFrac, kClockDividerNfcDiv, kClockDividerSpecial1, kClockDividerMax, kClockDividerOutdiv1, kClockDividerOutdiv2, kClockDividerOutdiv3, kClockDividerOutdiv4, kClockDividerUsbFrac, kClockDividerUsbDiv, kClockDividerUsbfsFrac, kClockDividerUsbfsDiv, kClockDividerUsbhsFrac, kClockDividerUsbhsDiv, kClockDividerLcdcFrac, kClockDividerLcdcDiv, kClockDividerNfcFrac, kClockDividerNfcDiv, kClockDividerSpecial1, kClockDividerMax, kClockDividerOutdiv1, kClockDividerOutdiv2, kClockDividerOutdiv3, kClockDividerOutdiv4, kClockDividerUsbFrac, kClockDividerUsbDiv, kClockDividerUsbfsFrac, kClockDividerUsbfsDiv, kClockDividerUsbhsFrac, kClockDividerUsbhsDiv, kClockDividerLcdcFrac, kClockDividerLcdcDiv, kClockDividerNfcFrac, kClockDividerNfcDiv, kClockDividerSpecial1, kClockDividerMax, kClockDividerOutdiv1, kClockDividerOutdiv2, kClockDividerOutdiv3, kClockDividerOutdiv4, kClockDividerUsbFrac, kClockDividerUsbDiv, kClockDividerUsbfsFrac, kClockDividerUsbfsDiv, kClockDividerUsbhsFrac, kClockDividerUsbhsDiv, kClockDividerLcdcFrac, kClockDividerLcdcDiv, kClockDividerNfcFrac, kClockDividerNfcDiv, kClockDividerSpecial1, kClockDividerMax } |
Clock Divider names. | |
enum | sim_usbsstby_stop_t { kSimUsbsstbyNoRegulator, kSimUsbsstbyWithRegulator, kSimUsbsstbyNoRegulator, kSimUsbsstbyWithRegulator, kSimUsbsstbyNoRegulator, kSimUsbsstbyWithRegulator, kSimUsbsstbyNoRegulator, kSimUsbsstbyWithRegulator, kSimUsbsstbyNoRegulator, kSimUsbsstbyWithRegulator } |
SIM USB voltage regulator in standby mode setting during stop modes. | |
enum | sim_usbvstby_stop_t { kSimUsbvstbyNoRegulator, kSimUsbvstbyWithRegulator, kSimUsbvstbyNoRegulator, kSimUsbvstbyWithRegulator, kSimUsbvstbyNoRegulator, kSimUsbvstbyWithRegulator, kSimUsbvstbyNoRegulator, kSimUsbvstbyWithRegulator, kSimUsbvstbyNoRegulator, kSimUsbvstbyWithRegulator } |
SIM USB voltage regulator in standby mode setting during VLPR and VLPW modes. | |
enum | sim_cmtuartpad_strengh_t { kSimCmtuartSinglePad, kSimCmtuartDualPad, kSimCmtuartSinglePad, kSimCmtuartDualPad, kSimCmtuartSinglePad, kSimCmtuartDualPad, kSimCmtuartSinglePad, kSimCmtuartDualPad, kSimCmtuartSinglePad, kSimCmtuartDualPad } |
SIM CMT/UART pad drive strength. | |
enum | sim_ptd7pad_strengh_t { kSimPtd7padSinglePad, kSimPtd7padDualPad, kSimPtd7padSinglePad, kSimPtd7padDualPad, kSimPtd7padSinglePad, kSimPtd7padDualPad, kSimPtd7padSinglePad, kSimPtd7padDualPad, kSimPtd7padSinglePad, kSimPtd7padDualPad } |
SIM PTD7 pad drive strength. | |
enum | sim_flexbus_security_level_t { kSimFbslLevel0, kSimFbslLevel1, kSimFbslLevel2, kSimFbslLevel3, kSimFbslLevel0, kSimFbslLevel1, kSimFbslLevel2, kSimFbslLevel3, kSimFbslLevel0, kSimFbslLevel1, kSimFbslLevel2, kSimFbslLevel3, kSimFbslLevel0, kSimFbslLevel1, kSimFbslLevel2, kSimFbslLevel3, kSimFbslLevel0, kSimFbslLevel1, kSimFbslLevel2, kSimFbslLevel3 } |
SIM FlexBus security level. | |
enum | sim_uart_rxsrc_t { kSimUartRxsrcPin, kSimUartRxsrcCmp0, kSimUartRxsrcPin, kSimUartRxsrcCmp0, kSimUartRxsrcPin, kSimUartRxsrcCmp0, kSimUartRxsrcPin, kSimUartRxsrcCmp0, kSimUartRxsrcPin, kSimUartRxsrcCmp0, kSimUartRxsrcCmp1, kSimUartRxsrcReserved, kSimUartRxsrcPin, kSimUartRxsrcCmp0, kSimUartRxsrcCmp1, kSimUartRxsrcReserved, kSimUartRxsrcPin, kSimUartRxsrcCmp0, kSimUartRxsrcCmp1, kSimUartRxsrcReserved, kSimUartRxsrcPin, kSimUartRxsrcCmp0, kSimUartRxsrcCmp1, kSimUartRxsrcReserved, kSimUartRxsrcPin, kSimUartRxsrcCmp0, kSimUartRxsrcCmp1, kSimUartRxsrcReserved } |
SIM UART receive data source select. | |
enum | sim_uart_txsrc_t { kSimUartTxsrcPin, kSimUartTxsrcTpm0, kSimUartTxsrcTpm1, kSimUartTxsrcReserved, kSimUartTxsrcPin, kSimUartTxsrcTpm0, kSimUartTxsrcTpm1, kSimUartTxsrcReserved, kSimUartTxsrcPin, kSimUartTxsrcTpm0, kSimUartTxsrcTpm1, kSimUartTxsrcReserved, kSimUartTxsrcPin, kSimUartTxsrcTpm0, kSimUartTxsrcTpm1, kSimUartTxsrcReserved, kSimUartTxsrcPin, kSimUartTxsrcFtm1, kSimUartTxsrcPin, kSimUartTxsrcFtm1, kSimUartTxsrcPin, kSimUartTxsrcFtm1, kSimUartTxsrcPin, kSimUartTxsrcFtm1, kSimUartTxsrcPin, kSimUartTxsrcFtm1 } |
SIM UART transmit data source select. | |
enum | sim_ftm_trg_src_t { kSimFtmTrgSrc0, kSimFtmTrgSrc1, kSimFtmTrgSrc0, kSimFtmTrgSrc1, kSimFtmTrgSrc0, kSimFtmTrgSrc1, kSimFtmTrgSrc0, kSimFtmTrgSrc1, kSimFtmTrgSrc0, kSimFtmTrgSrc1 } |
SIM FlexTimer x trigger y select. | |
enum | sim_ftm_clk_sel_t { kSimFtmClkSel0, kSimFtmClkSel1, kSimFtmClkSel2, kSimFtmClkSel0, kSimFtmClkSel1, kSimFtmClkSel2, kSimFtmClkSel0, kSimFtmClkSel1, kSimFtmClkSel2, kSimFtmClkSel0, kSimFtmClkSel1, kSimFtmClkSel2, kSimFtmClkSel0, kSimFtmClkSel1, kSimFtmClkSel2 } |
SIM FlexTimer external clock select. | |
enum | sim_ftm_ch_src_t { kSimFtmChSrc0, kSimFtmChSrc1, kSimFtmChSrc2, kSimFtmChSrc3, kSimFtmChSrc0, kSimFtmChSrc1, kSimFtmChSrc2, kSimFtmChSrc3, kSimFtmChSrc0, kSimFtmChSrc1, kSimFtmChSrc2, kSimFtmChSrc3, kSimFtmChSrc0, kSimFtmChSrc1, kSimFtmChSrc2, kSimFtmChSrc3, kSimFtmChSrc0, kSimFtmChSrc1, kSimFtmChSrc2, kSimFtmChSrc3 } |
SIM FlexTimer x channel y input capture source select. | |
enum | sim_ftm_ch_out_src_t { kSimFtmChOutSrc0, kSimFtmChOutSrc1, kSimFtmChOutSrc0, kSimFtmChOutSrc1, kSimFtmChOutSrc0, kSimFtmChOutSrc1, kSimFtmChOutSrc0, kSimFtmChOutSrc1, kSimFtmChOutSrc0, kSimFtmChOutSrc1 } |
SIM FlexTimer x channel y output source select. | |
enum | sim_ftm_flt_sel_t { kSimFtmFltSel0, kSimFtmFltSel1, kSimFtmFltSel0, kSimFtmFltSel1, kSimFtmFltSel0, kSimFtmFltSel1, kSimFtmFltSel0, kSimFtmFltSel1, kSimFtmFltSel0, kSimFtmFltSel1 } |
SIM FlexTimer x Fault y select. | |
enum | sim_tpm_clk_sel_t { kSimTpmClkSel0, kSimTpmClkSel1, kSimTpmClkSel0, kSimTpmClkSel1, kSimTpmClkSel0, kSimTpmClkSel1, kSimTpmClkSel0, kSimTpmClkSel1, kSimTpmClkSel0, kSimTpmClkSel1, kSimTpmClkSel0, kSimTpmClkSel1, kSimTpmClkSel0, kSimTpmClkSel1, kSimTpmClkSel0, kSimTpmClkSel1, kSimTpmClkSel0, kSimTpmClkSel1 } |
SIM Timer/PWM external clock select. | |
enum | sim_tpm_ch_src_t { kSimTpmChSrc0, kSimTpmChSrc1, kSimTpmChSrc2, kSimTpmChSrc3, kSimTpmChSrc0, kSimTpmChSrc1, kSimTpmChSrc2, kSimTpmChSrc3, kSimTpmChSrc0, kSimTpmChSrc1, kSimTpmChSrc2, kSimTpmChSrc3, kSimTpmChSrc0, kSimTpmChSrc1, kSimTpmChSrc2, kSimTpmChSrc3, kSimTpmChSrc0, kSimTpmChSrc1, kSimTpmChSrc0, kSimTpmChSrc1, kSimTpmChSrc0, kSimTpmChSrc1, kSimTpmChSrc0, kSimTpmChSrc1, kSimTpmChSrc0, kSimTpmChSrc1 } |
SIM Timer/PWM x channel y input capture source select. | |
Functions | |
sim_hal_status_t | CLOCK_HAL_SetSource (SIM_Type *base, clock_source_names_t clockSource, uint8_t setting) |
Sets the clock source setting. More... | |
sim_hal_status_t | CLOCK_HAL_GetSource (SIM_Type *base, clock_source_names_t clockSource, uint8_t *setting) |
Gets the clock source setting. More... | |
sim_hal_status_t | CLOCK_HAL_SetDivider (SIM_Type *base, clock_divider_names_t clockDivider, uint32_t setting) |
Sets the clock divider setting. More... | |
static void | CLOCK_HAL_SetNanoedgePMCPwrRdy (SIM_Type *base, bool select) |
Set Nanoedge PMC POWER Ready. More... | |
static bool | CLOCK_HAL_GetNanoedgePMCPwrRdy (SIM_Type *base) |
Get Nanoedge PMC POWER Ready. More... | |
static void | CLOCK_HAL_EnableNanoedgePmcPowerDectect (SIM_Type *base) |
Nanoedge PMC POWER Dectect Enable. More... | |
static void | CLOCK_HAL_DisableNanoedgePmcPowerDectect (SIM_Type *base) |
Nanoedge PMC POWER Dectect Disable. More... | |
static bool | CLOCK_HAL_GetNanoedgePmcPowerDectectcmd (SIM_Type *base) |
Get Nanoedge PMC POWER Dectect. More... | |
static bool | CLOCK_HAL_GetAdcClkStatus (SIM_Type *base) |
Get ADC Clock Status. More... | |
static void | CLOCK_HAL_EnableAdcLowCurrentMode (SIM_Type *base) |
Enable ADC low current Mode. More... | |
static void | CLOCK_HAL_DisableAdcLowCurrentMode (SIM_Type *base) |
Disable ADC low current Mode. More... | |
static bool | CLOCK_HAL_GetAdcLowCurrentModecmd (SIM_Type *base) |
Get ADC low current Mode. More... | |
IP related clock feature APIs | |
void | CLOCK_HAL_SetOutDiv (SIM_Type *base, uint8_t outdiv1, uint8_t outdiv2, uint8_t outdiv3, uint8_t outdiv4) |
Sets the clock out dividers setting. More... | |
void | CLOCK_HAL_GetOutDiv (SIM_Type *base, uint8_t *outdiv1, uint8_t *outdiv2, uint8_t *outdiv3, uint8_t *outdiv4) |
Gets the clock out dividers setting. More... | |
individual field access APIs | |
void | SIM_HAL_SetAdcAlternativeTriggerCmd (SIM_Type *base, sim_cadc_conv_id_t convId, sim_adc_alt_trg_en enable) |
Sets the ADCx alternate trigger enable setting. More... | |
sim_adc_alt_trg_en | SIM_HAL_GetAdcAlternativeTriggerCmd (SIM_Type *base, sim_cadc_conv_id_t convId) |
Gets the ADCx alternate trigger enable setting. More... | |
void | SIM_HAL_SetAdcTriggerMode (SIM_Type *base, sim_cadc_conv_id_t convId, sim_adc_trg_sel_t select) |
Sets the ADCx trigger select setting. More... | |
sim_adc_trg_sel_t | SIM_HAL_GetAdcTriggerMode (SIM_Type *base, sim_cadc_conv_id_t convId) |
Gets the ADCx trigger select setting. More... | |
void | SIM_HAL_SetAdcTriggerModeOneStep (SIM_Type *base, sim_cadc_conv_id_t convId, bool altTrigEn, sim_adc_trg_sel_t trigSel) |
Set ADCx trigger setting. More... | |
void | SIM_HAL_SetUartRxSrcMode (SIM_Type *base, uint32_t instance, sim_uart_rxsrc_t select) |
Sets the UARTx receive data source select setting. More... | |
sim_uart_rxsrc_t | SIM_HAL_GetUartRxSrcMode (SIM_Type *base, uint32_t instance) |
Gets the UARTx receive data source select setting. More... | |
void | SIM_HAL_SetUartTxSrcMode (SIM_Type *base, uint32_t instance, sim_uart_txsrc_t select) |
Sets the UARTx transmit data source select setting. More... | |
sim_uart_txsrc_t | SIM_HAL_GetUartTxSrcMode (SIM_Type *base, uint32_t instance) |
Gets the UARTx transmit data source select setting. More... | |
static uint32_t | SIM_HAL_GetPinCntId (SIM_Type *base) |
Gets the Kinetis Pincount ID in System Device ID register (SIM_SDID). More... | |
static uint32_t | SIM_HAL_GetRevId (SIM_Type *base) |
Gets the Kinetis Revision ID in the System Device ID register (SIM_SDID). More... | |
static uint32_t | SIM_HAL_GetProgramFlashSize (SIM_Type *base) |
Gets the program flash size in the Flash Configuration Register 1 (SIM_FCFG). More... | |
static void | SIM_HAL_SetDebugTraceDivEnCmd (SIM_Type *base, bool enable) |
Sets the Debug Trace Divider Control. More... | |
static bool | SIM_HAL_GetDebugTraceDivEnCmd (SIM_Type *base) |
Gets the Debug Trace Divider Control. More... | |
static void | SIM_HAL_SetDebugTraceDivDivisor (SIM_Type *base, uint8_t divisor_value) |
Sets the Debug Trace Divider Divisor. More... | |
static uint8_t | SIM_HAL_GetDebugTraceDivDivisor (SIM_Type *base) |
Gets the Debug Trace Divider Divisor value. More... | |
static void | SIM_HAL_SetDebugTraceFracDivDivisor (SIM_Type *base, bool divisor_frac_value) |
Sets the Debug Trace Divider Divisor. More... | |
static uint8_t | SIM_HAL_GetDebugTraceFracDivDivisor (SIM_Type *base) |
Gets the Debug Trace Divider Divisor value. More... | |
static void | SIM_HAL_EnableClock (SIM_Type *base, sim_clock_gate_name_t name) |
Enable the clock for specific module. More... | |
static void | SIM_HAL_DisableClock (SIM_Type *base, sim_clock_gate_name_t name) |
Disable the clock for specific module. More... | |
static bool | SIM_HAL_GetGateCmd (SIM_Type *base, sim_clock_gate_name_t name) |
Get the the clock gate state for specific module. More... | |
IP related clock feature APIs | |
static void | CLOCK_HAL_SetOutDiv1 (SIM_Type *base, uint8_t setting) |
Set OUTDIV1. More... | |
static uint8_t | CLOCK_HAL_GetOutDiv1 (SIM_Type *base) |
Get OUTDIV1. More... | |
static void | CLOCK_HAL_SetOutDiv2 (SIM_Type *base, uint8_t setting) |
Set OUTDIV2. More... | |
static uint8_t | CLOCK_HAL_GetOutDiv2 (SIM_Type *base) |
Get OUTDIV2. More... | |
static void | CLOCK_HAL_SetOutDiv4 (SIM_Type *base, uint8_t setting) |
Set OUTDIV4. More... | |
static uint8_t | CLOCK_HAL_GetOutDiv4 (SIM_Type *base) |
Get OUTDIV4. More... | |
void | SIM_HAL_EnableDmaClock (SIM_Type *base, uint32_t instance) |
Enable the clock for DMA module. More... | |
void | SIM_HAL_DisableDmaClock (SIM_Type *base, uint32_t instance) |
Disable the clock for DMA module. More... | |
bool | SIM_HAL_GetDmaGateCmd (SIM_Type *base, uint32_t instance) |
Get the the clock gate state for DMA module. More... | |
void | SIM_HAL_EnableDmamuxClock (SIM_Type *base, uint32_t instance) |
Enable the clock for DMAMUX module. More... | |
void | SIM_HAL_DisableDmamuxClock (SIM_Type *base, uint32_t instance) |
Disable the clock for DMAMUX module. More... | |
bool | SIM_HAL_GetDmamuxGateCmd (SIM_Type *base, uint32_t instance) |
Get the the clock gate state for DMAMUX module. More... | |
void | SIM_HAL_EnablePortClock (SIM_Type *base, uint32_t instance) |
Enable the clock for PORT module. More... | |
void | SIM_HAL_DisablePortClock (SIM_Type *base, uint32_t instance) |
Disable the clock for PORT module. More... | |
bool | SIM_HAL_GetPortGateCmd (SIM_Type *base, uint32_t instance) |
Get the the clock gate state for PORT module. More... | |
void | SIM_HAL_EnableEwmClock (SIM_Type *base, uint32_t instance) |
Enable the clock for EWM module. More... | |
void | SIM_HAL_DisableEwmClock (SIM_Type *base, uint32_t instance) |
Disable the clock for EWM module. More... | |
bool | SIM_HAL_GetEwmGateCmd (SIM_Type *base, uint32_t instance) |
Get the the clock gate state for EWM module. More... | |
void | SIM_HAL_EnableFtfClock (SIM_Type *base, uint32_t instance) |
Enable the clock for FTF module. More... | |
void | SIM_HAL_DisableFtfClock (SIM_Type *base, uint32_t instance) |
Disable the clock for FTF module. More... | |
bool | SIM_HAL_GetFtfGateCmd (SIM_Type *base, uint32_t instance) |
Get the the clock gate state for FTF module. More... | |
void | SIM_HAL_EnableCrcClock (SIM_Type *base, uint32_t instance) |
Enable the clock for CRC module. More... | |
void | SIM_HAL_DisableCrcClock (SIM_Type *base, uint32_t instance) |
Disable the clock for CRC module. More... | |
bool | SIM_HAL_GetCrcGateCmd (SIM_Type *base, uint32_t instance) |
Get the the clock gate state for CRC module. More... | |
void | SIM_HAL_EnableAdcClock (SIM_Type *base, uint32_t instance) |
Enable the clock for ADC module. More... | |
void | SIM_HAL_DisableAdcClock (SIM_Type *base, uint32_t instance) |
Disable the clock for ADC module. More... | |
bool | SIM_HAL_GetAdcGateCmd (SIM_Type *base, uint32_t instance) |
Get the the clock gate state for ADC module. More... | |
void | SIM_HAL_EnableCmpClock (SIM_Type *base, uint32_t instance) |
Enable the clock for CMP module. More... | |
void | SIM_HAL_DisableCmpClock (SIM_Type *base, uint32_t instance) |
Disable the clock for CMP module. More... | |
bool | SIM_HAL_GetCmpGateCmd (SIM_Type *base, uint32_t instance) |
Get the the clock gate state for CMP module. More... | |
void | SIM_HAL_EnableDacClock (SIM_Type *base, uint32_t instance) |
Enable the clock for DAC module. More... | |
void | SIM_HAL_DisableDacClock (SIM_Type *base, uint32_t instance) |
Disable the clock for DAC module. More... | |
bool | SIM_HAL_GetDacGateCmd (SIM_Type *base, uint32_t instance) |
Get the the clock gate state for DAC module. More... | |
void | SIM_HAL_EnablePdbClock (SIM_Type *base, uint32_t instance) |
Enable the clock for PDB module. More... | |
void | SIM_HAL_DisablePdbClock (SIM_Type *base, uint32_t instance) |
Disable the clock for PDB module. More... | |
bool | SIM_HAL_GetPdbGateCmd (SIM_Type *base, uint32_t instance) |
Get the the clock gate state for PDB module. More... | |
void | SIM_HAL_EnableFtmClock (SIM_Type *base, uint32_t instance) |
Enable the clock for FTM module. More... | |
void | SIM_HAL_DisableFtmClock (SIM_Type *base, uint32_t instance) |
Disable the clock for FTM module. More... | |
bool | SIM_HAL_GetFtmGateCmd (SIM_Type *base, uint32_t instance) |
Get the the clock gate state for FTM module. More... | |
void | SIM_HAL_SetAdcxMuxSelChannely (SIM_Type *base, uint32_t instance, uint8_t channel, uint8_t select) |
Set the ADC x (0-A, 1-B)channel y (6,7) Mux. More... | |
uint8_t | SIM_HAL_GetAdcxMuxSelChannely (SIM_Type *base, uint32_t instance, uint8_t channel) |
Get the ADC x (0-A, 1-B)channel y (6,7) Mux. More... | |
void | SIM_HAL_SetNanoedgeRegulator12SupStdbyControl (SIM_Type *base, uint8_t select) |
Set Nanoedge Regulator 1.2 V Supply Standby Control. More... | |
uint8_t | SIM_HAL_GetNanoedgeRegulator12SupStdbyControl (SIM_Type *base) |
Get Nanoedge Regulator 1.2 V Supply Standby Control. More... | |
void | SIM_HAL_SetNanoedgeRegulator27SupStdbyControl (SIM_Type *base, uint8_t select) |
Set Nanoedge Regulator 2.7 V Supply Standby Control. More... | |
uint8_t | SIM_HAL_GetNanoedgeRegulator27SupStdbyControl (SIM_Type *base) |
Get Nanoedge Regulator 2.7 V Supply Standby Control. More... | |
void | SIM_HAL_SetNanoedgeReg27n12SupPwrdwnControl (SIM_Type *base, uint8_t select) |
Set Nanoedge Regulator 2.7V and 1.2V Supply Powerdown Control. More... | |
uint8_t | SIM_HAL_GetNanoedgeReg27n12SupPwrdwnControl (SIM_Type *base) |
Get Nanoedge Regulator 2.7V and 1.2V Supply Powerdown Control. More... | |
void | SIM_HAL_SetWdogClkSrc (SIM_Type *base, bool select) |
WDOG Clock Select. More... | |
bool | SIM_HAL_GetWdogClkSrc (SIM_Type *base) |
Get WDOG Clock Src. More... | |
void | SIM_HAL_EnableSyncXbarAPittrigX (SIM_Type *base, uint32_t instance) |
Synchronize XBARA's Input PIT Trigger X with fast clock. More... | |
void | SIM_HAL_DisableSyncXbarAPittrigX (SIM_Type *base, uint32_t instance) |
Synchronize XBARA's Input PIT Trigger X with fast clock. More... | |
bool | SIM_HAL_GetSyncXbarAPittrigXcmd (SIM_Type *base, uint32_t instance) |
get Synchronization of XBARA's Input PIT Trigger X with fast clock More... | |
void | SIM_HAL_EnableSyncXbarBPittrigX (SIM_Type *base, uint32_t instance) |
Synchronize XBARB's Input PIT Trigger X with fast clock. More... | |
void | SIM_HAL_DisableSyncXbarBPittrigX (SIM_Type *base, uint32_t instance) |
Synchronize XBARB's Input PIT Trigger X with fast clock. More... | |
bool | SIM_HAL_GetSyncXbarBPittrigXcmd (SIM_Type *base, uint32_t instance) |
get Synchronization of XBARB's Input PIT Trigger X with fast clock More... | |
void | SIM_HAL_EnableSyncXbarDac (SIM_Type *base) |
Synchronize XBARA's output for DAC Hardware Trigger with flash/slow clock. More... | |
void | SIM_HAL_DisableSyncXbarDac (SIM_Type *base) |
Synchronize XBARA's output for DAC Hardware Trigger with flash/slow clock. More... | |
bool | SIM_HAL_GetSyncXbarDaccmd (SIM_Type *base) |
Get the synchronizer cmd between XBARA's output and DAC hardware trigger. More... | |
void | SIM_HAL_EnableSyncXbarEwmin (SIM_Type *base) |
Get the synchronizer cmd between XBARA's output and EWM's ewm_in. More... | |
void | SIM_HAL_DisableSyncXbarEwmin (SIM_Type *base) |
Disable the synchronizer between XBARA's output and EWM's ewm_in. More... | |
bool | SIM_HAL_GetSyncXbarEwmincmd (SIM_Type *base) |
Get the synchronizer cmd between XBARA's output and EWM's ewm_in. More... | |
void | SIM_HAL_EnableSyncXbarCmpX (SIM_Type *base, uint32_t instance) |
Enable the the synchronizer between XBARA's output and CMPx's sample/window input. More... | |
void | SIM_HAL_DisableSyncXbarCmpX (SIM_Type *base, uint32_t instance) |
Disable the synchronizer between XBARA's output and CMP3's sample/window input. More... | |
bool | SIM_HAL_GetSyncXbarCmpXcmd (SIM_Type *base, uint32_t instance) |
Get the synchronizer cmd between XBARA's output and CMP3's sample/window input. More... | |
void | SIM_HAL_SetCmpWinxSrc (SIM_Type *base, uint32_t instance, sim_cmp_win_in_src select) |
Set CMP Sample/Window Input X Source. More... | |
sim_cmp_win_in_src | SIM_HAL_GetCmpWinxSrc (SIM_Type *base, uint32_t instance) |
Get CMP Sample/Window Input X Source. More... | |
void | SIM_HAL_SetEwmInSrc (SIM_Type *base, sim_ewm_in_src select) |
Set EWM_IN source setting. More... | |
sim_ewm_in_src | SIM_HAL_GetEwmInSrc (SIM_Type *base) |
Get EWM_IN source setting. More... | |
void | SIM_HAL_SetDacHwTrigSrc (SIM_Type *base, sim_dac_hw_trg_sel select) |
Set DAC x Hardware trigger source setting. More... | |
sim_dac_hw_trg_sel | SIM_HAL_GetDacHwTrigSrc (SIM_Type *base, uint32_t instance) |
Get DAC x Hardware trigger source setting. More... | |
void | SIM_HAL_EnablePitClock (SIM_Type *base, uint32_t instance) |
Enable the clock for PIT module. More... | |
void | SIM_HAL_DisablePitClock (SIM_Type *base, uint32_t instance) |
Disable the clock for PIT module. More... | |
bool | SIM_HAL_GetPitGateCmd (SIM_Type *base, uint32_t instance) |
Get the the clock gate state for PIT module. More... | |
void | SIM_HAL_EnableLptmrClock (SIM_Type *base, uint32_t instance) |
Enable the clock for LPTIMER module. More... | |
void | SIM_HAL_DisableLptmrClock (SIM_Type *base, uint32_t instance) |
Disable the clock for LPTIMER module. More... | |
bool | SIM_HAL_GetLptmrGateCmd (SIM_Type *base, uint32_t instance) |
Get the the clock gate state for LPTIMER module. More... | |
void | SIM_HAL_EnableFlexcanClock (SIM_Type *base, uint32_t instance) |
Enable the clock for FLEXCAN module. More... | |
void | SIM_HAL_DisableFlexcanClock (SIM_Type *base, uint32_t instance) |
Disable the clock for FLEXCAN module. More... | |
bool | SIM_HAL_GetFlexcanGateCmd (SIM_Type *base, uint32_t instance) |
Get the the clock gate state for FLEXCAN module. More... | |
void | SIM_HAL_EnableSpiClock (SIM_Type *base, uint32_t instance) |
Enable the clock for SPI module. More... | |
void | SIM_HAL_DisableSpiClock (SIM_Type *base, uint32_t instance) |
Disable the clock for SPI module. More... | |
bool | SIM_HAL_GetSpiGateCmd (SIM_Type *base, uint32_t instance) |
Get the the clock gate state for SPI module. More... | |
void | SIM_HAL_EnableI2cClock (SIM_Type *base, uint32_t instance) |
Enable the clock for I2C module. More... | |
void | SIM_HAL_DisableI2cClock (SIM_Type *base, uint32_t instance) |
Disable the clock for I2C module. More... | |
bool | SIM_HAL_GetI2cGateCmd (SIM_Type *base, uint32_t instance) |
Get the the clock gate state for I2C module. More... | |
void | SIM_HAL_EnableUartClock (SIM_Type *base, uint32_t instance) |
Enable the clock for UART module. More... | |
void | SIM_HAL_DisableUartClock (SIM_Type *base, uint32_t instance) |
Disable the clock for UART module. More... | |
bool | SIM_HAL_GetUartGateCmd (SIM_Type *base, uint32_t instance) |
Get the the clock gate state for UART module. More... | |
void | SIM_HAL_EnablePwmClock (SIM_Type *base, uint32_t instance) |
Enable the clock for eFlexPWM module. More... | |
void | SIM_HAL_DisablePwmClock (SIM_Type *base, uint32_t instance) |
Disable the clock for eFlexPWM module. More... | |
bool | SIM_HAL_GetPwmGateCmd (SIM_Type *base, uint32_t instance) |
Get the the clock gate state for eFlexPWM module. More... | |
void | SIM_HAL_EnableAoiClock (SIM_Type *base, uint32_t instance) |
Enable the clock for AOI module. More... | |
void | SIM_HAL_DisableAoiClock (SIM_Type *base, uint32_t instance) |
Disable the clock for AOI module. More... | |
bool | SIM_HAL_GetAoiGateCmd (SIM_Type *base, uint32_t instance) |
Get the the clock gate state for AOI module. More... | |
void | SIM_HAL_EnableXbarClock (SIM_Type *base, uint32_t instance) |
Enable the clock for XBAR module. More... | |
void | SIM_HAL_DisableXbarClock (SIM_Type *base, uint32_t instance) |
Disable the clock for XBAR module. More... | |
bool | SIM_HAL_GetXbarGateCmd (SIM_Type *base, uint32_t instance) |
Get the the clock gate state for XBAR module. More... | |
void | SIM_HAL_EnableEncClock (SIM_Type *base, uint32_t instance) |
Enable the clock for ENC module. More... | |
void | SIM_HAL_DisableEncClock (SIM_Type *base, uint32_t instance) |
Disable the clock for ENC module. More... | |
bool | SIM_HAL_GetEncGateCmd (SIM_Type *base, uint32_t instance) |
Get the the clock gate state for ENC module. More... | |
static void | CLOCK_HAL_SetExternalRefClock32kSrc (SIM_Type *base, clock_er32k_src_t setting) |
Set the clock selection of ERCLK32K. More... | |
static clock_er32k_src_t | CLOCK_HAL_GetExternalRefClock32kSrc (SIM_Type *base) |
Get the clock selection of ERCLK32K. More... | |
static void | CLOCK_HAL_SetTraceClkSrc (SIM_Type *base, clock_trace_src_t setting) |
Set debug trace clock selection. More... | |
static clock_trace_src_t | CLOCK_HAL_GetTraceClkSrc (SIM_Type *base) |
Get debug trace clock selection. More... | |
static void | CLOCK_HAL_SetNanoedgeClkSrc (SIM_Type *base, clock_nanoedge_clk2x_src setting) |
Set Nanoedge clock selection. More... | |
static clock_nanoedge_clk2x_src | CLOCK_HAL_GetNanoedgeClkSrc (SIM_Type *base) |
Get Nanoedge clock selection. More... | |
static bool | CLOCK_HAL_GetNanoedgePMCStatus (SIM_Type *base) |
Get Nanoedge PMC Status. More... | |
void SIM_HAL_SetAdcAlternativeTriggerCmd | ( | SIM_Type * | base, |
sim_cadc_conv_id_t | convId, | ||
sim_adc_alt_trg_en | enable | ||
) |
This function enables/disables the alternative conversion triggers for ADCx.
base | Base address for current SIM instance. |
convId | Selection of ID for ADC converter. |
enable | Enable alternative conversion triggers for ADCx
|
sim_adc_alt_trg_en SIM_HAL_GetAdcAlternativeTriggerCmd | ( | SIM_Type * | base, |
sim_cadc_conv_id_t | convId | ||
) |
This function gets the ADCx alternate trigger enable setting.
base | Base address for current SIM instance. |
convId | Selection of ID for ADC converter. |
void SIM_HAL_SetAdcTriggerMode | ( | SIM_Type * | base, |
sim_cadc_conv_id_t | convId, | ||
sim_adc_trg_sel_t | select | ||
) |
This function selects the ADCx trigger source when alternative triggers are enabled through ADCxALTTRGEN.
base | Base address for current SIM instance. |
convId | Selection of ID for ADC converter. |
select | trigger select setting for ADCx
|
sim_adc_trg_sel_t SIM_HAL_GetAdcTriggerMode | ( | SIM_Type * | base, |
sim_cadc_conv_id_t | convId | ||
) |
This function gets the ADCx trigger select setting.
base | Base address for current SIM instance. |
convId | Selection of ID for ADC converter. |
void SIM_HAL_SetAdcTriggerModeOneStep | ( | SIM_Type * | base, |
sim_cadc_conv_id_t | convId, | ||
bool | altTrigEn, | ||
sim_adc_trg_sel_t | trigSel | ||
) |
This function sets ADC alternate trigger and trigger mode.
base | Base address for current SIM instance. |
convId | device instance. |
altTrigEn | alternate trigger enable |
trigSel | 00 XBARA output 12, 01 PDB0 trigger selected for ADCA, 1- Alternate trigger selected for ADCA. |
|
inlinestatic |
This function gets the Kinetis Pincount ID in System Device ID register.
base | Base address for current SIM instance. |
|
inlinestatic |
This function gets the Kinetis Revision ID in System Device ID register.
base | Base address for current SIM instance. |
|
inlinestatic |
This function gets the program flash size in the Flash Configuration Register 1.
base | Base address for current SIM instance. |
|
inlinestatic |
This function sets the Debug Trace Divider enable setting.
base | Base address for current SIM instance. |
enable | Debug trace divider control enable setting |
|
inlinestatic |
This function gets the Debug Trace Divider enable setting.
base | Base address for current SIM instance. |
|
inlinestatic |
This function sets the Debug Trace Divider Divisor value.
base | Base address for current SIM instance. |
divisor_value | divide value for the fractional clock divider |
|
inlinestatic |
This function gets the Debug Trace Divider enable setting.
base | Base address for current SIM instance. |
|
inlinestatic |
This function sets the Debug Trace Divider Divisor value.
base | Base address for current SIM instance. |
divisor_frac_value | divide value for the fractional clock divider |
|
inlinestatic |
This function gets the Debug Trace Divider enable setting.
base | Base address for current SIM instance. |
|
inlinestatic |
This function enables the clock for specific module.
base | Base address for current SIM instance. |
name | Name of the module to enable. |
|
inlinestatic |
This function disables the clock for specific module.
base | Base address for current SIM instance. |
name | Name of the module to disable. |
|
inlinestatic |
This function will get the clock gate state for specific module.
base | Base address for current SIM instance. |
name | Name of the module to get. |
|
inlinestatic |
This function sets divide value OUTDIV1.
base | Base address for current SIM instance. |
setting | The value to set. |
|
inlinestatic |
This function gets divide value OUTDIV1.
base | Base address for current SIM instance. |
|
inlinestatic |
This function sets divide value OUTDIV2.
base | Base address for current SIM instance. |
setting | The value to set. |
|
inlinestatic |
This function gets divide value OUTDIV2.
base | Base address for current SIM instance. |
|
inlinestatic |
This function sets divide value OUTDIV4.
base | Base address for current SIM instance. |
setting | The value to set. |
|
inlinestatic |
This function gets divide value OUTDIV4.
base | Base address for current SIM instance. |
void SIM_HAL_EnableDmaClock | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function enables the clock for DMA moudle.
base | Base address for current SIM instance. |
instance | module device instance |
void SIM_HAL_DisableDmaClock | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function disables the clock for DMA moudle.
base | Base address for current SIM instance. |
instance | module device instance |
bool SIM_HAL_GetDmaGateCmd | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function will get the clock gate state for DMA moudle.
base | Base address for current SIM instance. |
instance | module device instance |
void SIM_HAL_EnableDmamuxClock | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function enables the clock for DMAMUX moudle.
base | Base address for current SIM instance. |
instance | module device instance |
void SIM_HAL_DisableDmamuxClock | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function disables the clock for DMAMUX moudle.
base | Base address for current SIM instance. |
instance | module device instance |
bool SIM_HAL_GetDmamuxGateCmd | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function will get the clock gate state for DMAMUX moudle.
base | Base address for current SIM instance. |
instance | module device instance |
void SIM_HAL_EnablePortClock | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function enables the clock for PORT moudle.
base | Base address for current SIM instance. |
instance | module device instance |
void SIM_HAL_DisablePortClock | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function disables the clock for PORT moudle.
base | Base address for current SIM instance. |
instance | module device instance |
bool SIM_HAL_GetPortGateCmd | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function will get the clock gate state for PORT moudle.
base | Base address for current SIM instance. |
instance | module device instance |
void SIM_HAL_EnableEwmClock | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function enables the clock for EWM moudle.
base | Base address for current SIM instance. |
instance | module device instance |
void SIM_HAL_DisableEwmClock | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function disables the clock for EWM moudle.
base | Base address for current SIM instance. |
instance | module device instance |
bool SIM_HAL_GetEwmGateCmd | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function will get the clock gate state for EWM moudle.
base | Base address for current SIM instance. |
instance | module device instance |
void SIM_HAL_EnableFtfClock | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function enables the clock for FTF moudle.
base | Base address for current SIM instance. |
instance | module device instance |
void SIM_HAL_DisableFtfClock | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function disables the clock for FTF moudle.
base | Base address for current SIM instance. |
instance | module device instance |
bool SIM_HAL_GetFtfGateCmd | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function will get the clock gate state for FTF moudle.
base | Base address for current SIM instance. |
instance | module device instance |
void SIM_HAL_EnableCrcClock | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function enables the clock for CRC moudle.
base | Base address for current SIM instance. |
instance | module device instance |
void SIM_HAL_DisableCrcClock | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function disables the clock for CRC moudle.
base | Base address for current SIM instance. |
instance | module device instance |
bool SIM_HAL_GetCrcGateCmd | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function will get the clock gate state for CRC moudle.
base | Base address for current SIM instance. |
instance | module device instance |
void SIM_HAL_EnableAdcClock | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function enables the clock for ADC moudle.
base | Base address for current SIM instance. |
instance | module device instance |
void SIM_HAL_DisableAdcClock | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function disables the clock for ADC moudle.
base | Base address for current SIM instance. |
instance | module device instance |
bool SIM_HAL_GetAdcGateCmd | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function will get the clock gate state for ADC moudle.
base | Base address for current SIM instance. |
instance | module device instance |
void SIM_HAL_EnableCmpClock | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function enables the clock for CMP moudle.
base | Base address for current SIM instance. |
instance | module device instance |
void SIM_HAL_DisableCmpClock | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function disables the clock for CMP moudle.
base | Base address for current SIM instance. |
instance | module device instance |
bool SIM_HAL_GetCmpGateCmd | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function will get the clock gate state for CMP moudle.
base | Base address for current SIM instance. |
instance | module device instance |
void SIM_HAL_EnableDacClock | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function enables the clock for DAC moudle.
base | Base address for current SIM instance. |
instance | module device instance |
void SIM_HAL_DisableDacClock | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function disables the clock for DAC moudle.
base | Base address for current SIM instance. |
instance | module device instance |
bool SIM_HAL_GetDacGateCmd | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function will get the clock gate state for DAC moudle.
base | Base address for current SIM instance. |
instance | module device instance |
void SIM_HAL_EnablePdbClock | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function enables the clock for PDB moudle.
base | Base address for current SIM instance. |
instance | module device instance |
void SIM_HAL_DisablePdbClock | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function disables the clock for PDB moudle.
base | Base address for current SIM instance. |
instance | module device instance |
bool SIM_HAL_GetPdbGateCmd | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function will get the clock gate state for PDB moudle.
base | Base address for current SIM instance. |
instance | module device instance |
void SIM_HAL_EnableFtmClock | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function enables the clock for FTM moudle.
base | Base address for current SIM instance. |
instance | module device instance |
void SIM_HAL_DisableFtmClock | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function disables the clock for FTM moudle.
base | Base address for current SIM instance. |
instance | module device instance |
bool SIM_HAL_GetFtmGateCmd | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function will get the clock gate state for FTM moudle.
base | Base address for current SIM instance. |
instance | module device instance |
void SIM_HAL_SetAdcxMuxSelChannely | ( | SIM_Type * | base, |
uint32_t | instance, | ||
uint8_t | channel, | ||
uint8_t | select | ||
) |
This function selects ADCx MUXy's channel to ADCx channel y.
base | Base address for current SIM instance. |
instance | ADC module instance (0-A, 1-B) |
channel | channel number (6,7) |
select | Refer to RM for specific channel settings |
uint8_t SIM_HAL_GetAdcxMuxSelChannely | ( | SIM_Type * | base, |
uint32_t | instance, | ||
uint8_t | channel | ||
) |
This function gets the ADCx MUXy's channel to ADCx channel y.
base | Base address for current SIM instance. |
instance | ADC module instance (0-A, 1-B) |
channel | channel number (6,7) |
void SIM_HAL_SetNanoedgeRegulator12SupStdbyControl | ( | SIM_Type * | base, |
uint8_t | select | ||
) |
This function controls the standby mode of the 1.2 V supply from the nanoedge voltage regulator.
base | Base address for current SIM instance. |
select | 00 Nanoedge regulator 1.2 V supply placed in normal mode 01 Nanoedge regulator 1.2 V supply placed in standby mode. 10 Nanoedge regulator 1.2 V supply placed in normal mode and SR12STDBY is write protected until chip reset. 11 Nanoedge regulator 1.2 V supply placed in standby mode and SR12STDBY is write protected until chip reset. |
uint8_t SIM_HAL_GetNanoedgeRegulator12SupStdbyControl | ( | SIM_Type * | base | ) |
This function will get the standby mode of the 1.2 V supply from the nanoedge voltage regulator
base | Base address for current SIM instance. |
void SIM_HAL_SetNanoedgeRegulator27SupStdbyControl | ( | SIM_Type * | base, |
uint8_t | select | ||
) |
This function controls the standby mode of the 2.7 V supply from the nanoedge voltage regulator.
base | Base address for current SIM instance. |
select | 00 Nanoedge regulator 2.7 V supply placed in normal mode 01 Nanoedge regulator 2.7 V supply placed in standby mode. 10 Nanoedge regulator 2.7 V supply placed in normal mode and SR12STDBY is write protected until chip reset. 11 Nanoedge regulator 2.7 V supply placed in standby mode and SR12STDBY is write protected until chip reset. |
uint8_t SIM_HAL_GetNanoedgeRegulator27SupStdbyControl | ( | SIM_Type * | base | ) |
This function will get the standby mode of the 2.7 V supply from the nanoedge voltage regulator.
base | Base address for current SIM instance. |
void SIM_HAL_SetNanoedgeReg27n12SupPwrdwnControl | ( | SIM_Type * | base, |
uint8_t | select | ||
) |
This function controls the powerdown mode of the 2.7V and 1.2V supply from the nanoedge voltage regulator
base | Base address for current SIM instance. |
select | 00 Nanoedge regulator placed in normal mode. 01 Nanoedge regulator placed in powerdown mode. 10 Nanoedge regulator placed in normal mode and SRPDN is write protected until chip reset. 11 Nanoedge regulator placed in powerdown mode and SRPDN is write protected until chip reset. |
uint8_t SIM_HAL_GetNanoedgeReg27n12SupPwrdwnControl | ( | SIM_Type * | base | ) |
This function gets the the powerdown mode of the 2.7V and 1.2V supply from the nanoedge voltage regulator
base | Base address for current SIM instance. |
void SIM_HAL_SetWdogClkSrc | ( | SIM_Type * | base, |
bool | select | ||
) |
This function selects the clock source of the WDOG2008 watchdog.
base | Base address for current SIM instance. |
select | 0 Internal 1 kHz clock is source to WDOG2008 1 MCGIRCLK is source to WDOG2008 |
bool SIM_HAL_GetWdogClkSrc | ( | SIM_Type * | base | ) |
This function gets the clock source of the WDOG2008 watchdog.
base | Base address for current SIM instance. |
void SIM_HAL_EnableSyncXbarAPittrigX | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function enables the synchronizer between PIT trigger X and XBARA's input.
base | Base address for current SIM instance. |
instance | Pit trigger number |
void SIM_HAL_DisableSyncXbarAPittrigX | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function disables the synchronizer between PIT trigger X and XBARA's input.
base | Base address for current SIM instance. |
instance | Pit trigger number |
bool SIM_HAL_GetSyncXbarAPittrigXcmd | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function returns the status of the synchronizer between PIT trigger X and XBARA's input.
base | Base address for current SIM instance. |
instance | Pit trigger number |
void SIM_HAL_EnableSyncXbarBPittrigX | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function enables the synchronizer between PIT trigger X and XBARB's input.
base | Base address for current SIM instance. |
instance | Pit trigger number |
void SIM_HAL_DisableSyncXbarBPittrigX | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function disables the synchronizer between PIT trigger X and XBARB's input.
base | Base address for current SIM instance. |
instance | Pit trigger number |
bool SIM_HAL_GetSyncXbarBPittrigXcmd | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function returns the status of the synchronizer between PIT trigger X and XBARB's input.
base | Base address for current SIM instance. |
instance | Pit trigger number |
void SIM_HAL_EnableSyncXbarDac | ( | SIM_Type * | base | ) |
This function controls the synchronizer between XBARA's output and DAC hardware trigger.
base | Base address for current SIM instance. |
void SIM_HAL_DisableSyncXbarDac | ( | SIM_Type * | base | ) |
This function Disables the synchronizer between XBARA's output and DAC hardware trigger
base | Base address for current SIM instance. |
bool SIM_HAL_GetSyncXbarDaccmd | ( | SIM_Type * | base | ) |
base | Base address for current SIM instance. |
void SIM_HAL_EnableSyncXbarEwmin | ( | SIM_Type * | base | ) |
This function enables the synchronizer between XBARA's output and EWM's ewm_in
base | Base address for current SIM instance. |
void SIM_HAL_DisableSyncXbarEwmin | ( | SIM_Type * | base | ) |
This function Disables the synchronizer between XBARA's output and EWM's ewm_in
base | Base address for current SIM instance. |
bool SIM_HAL_GetSyncXbarEwmincmd | ( | SIM_Type * | base | ) |
base | Base address for current SIM instance. |
void SIM_HAL_EnableSyncXbarCmpX | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function enables the the synchronizer between XBARA's output and CMPx's sample/window input
base | Base address for current SIM instance. |
instance | comaprator instance |
void SIM_HAL_DisableSyncXbarCmpX | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function Disables the synchronizer between XBARA's output and CMP3's sample/window input
base | Base address for current SIM instance. |
instance | comaprator instance |
bool SIM_HAL_GetSyncXbarCmpXcmd | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
base | Base address for current SIM instance. |
instance | comaprator instance |
void SIM_HAL_SetCmpWinxSrc | ( | SIM_Type * | base, |
uint32_t | instance, | ||
sim_cmp_win_in_src | select | ||
) |
This function controls the sample/window source of CMP module
base | Base address for current SIM instance. |
instance | comaprator instance |
select | CMP Sample/Window Input X Source 00 XBARA output - refer RM for specific cmp instance 01 CMPx Sample/Window input is driven by both PDB0 and PDB1 pluse-out channel 0. 10 PDB0 pluse-out channel 0. 11 PDB1 pluse-out channel 0. |
sim_cmp_win_in_src SIM_HAL_GetCmpWinxSrc | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function will get the sample/window source of CMP module
base | Base address for current SIM instance. |
instance | comaprator instance |
void SIM_HAL_SetEwmInSrc | ( | SIM_Type * | base, |
sim_ewm_in_src | select | ||
) |
This function controls the ewm_in source of EWM module
base | Base address for current SIM instance. |
select | EWM_IN source , 0-XBARA output 58, 1-EWM_IN pin |
sim_ewm_in_src SIM_HAL_GetEwmInSrc | ( | SIM_Type * | base | ) |
This function will get the ewm_in source of EWM module
base | Base address for current SIM instance. |
void SIM_HAL_SetDacHwTrigSrc | ( | SIM_Type * | base, |
sim_dac_hw_trg_sel | select | ||
) |
This function will select the DAC0 Hardware Trigger Input Source
base | Base address for current SIM instance. |
select | DAC0 Hardware Trigger Input Source 00 XBARA output 15. 01 DAC0 can be triggered by both PDB0 interval trigger 0 and PDB1 interval trigger 0. 10 PDB0 interval trigger 0 11 PDB1 interval trigger 0 |
sim_dac_hw_trg_sel SIM_HAL_GetDacHwTrigSrc | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function will get the DAC0 Hardware Trigger Input Source
base | Base address for current SIM instance. |
instance | DAC instance. |
void SIM_HAL_EnablePitClock | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function enables the clock for PIT moudle.
base | Base address for current SIM instance. |
instance | module device instance |
void SIM_HAL_DisablePitClock | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function disables the clock for PIT moudle.
base | Base address for current SIM instance. |
instance | module device instance |
bool SIM_HAL_GetPitGateCmd | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function will get the clock gate state for PIT moudle.
base | Base address for current SIM instance. |
instance | module device instance |
void SIM_HAL_EnableLptmrClock | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function enables the clock for LPTIMER moudle.
base | Base address for current SIM instance. |
instance | module device instance |
void SIM_HAL_DisableLptmrClock | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function disables the clock for LPTIMER moudle.
base | Base address for current SIM instance. |
instance | module device instance |
bool SIM_HAL_GetLptmrGateCmd | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function will get the clock gate state for LPTIMER moudle.
base | Base address for current SIM instance. |
instance | module device instance |
void SIM_HAL_EnableFlexcanClock | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function enables the clock for FLEXCAN moudle.
base | Base address for current SIM instance. |
instance | module device instance |
void SIM_HAL_DisableFlexcanClock | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function disables the clock for FLEXCAN moudle.
base | Base address for current SIM instance. |
instance | module device instance |
bool SIM_HAL_GetFlexcanGateCmd | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function will get the clock gate state for FLEXCAN moudle.
base | Base address for current SIM instance. |
instance | module device instance |
void SIM_HAL_EnableSpiClock | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function enables the clock for SPI moudle.
base | Base address for current SIM instance. |
instance | module device instance |
void SIM_HAL_DisableSpiClock | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function disables the clock for SPI moudle.
base | Base address for current SIM instance. |
instance | module device instance |
bool SIM_HAL_GetSpiGateCmd | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function will get the clock gate state for SPI moudle.
base | Base address for current SIM instance. |
instance | module device instance |
void SIM_HAL_EnableI2cClock | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function enables the clock for I2C moudle.
base | Base address for current SIM instance. |
instance | module device instance |
void SIM_HAL_DisableI2cClock | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function disables the clock for I2C moudle.
base | Base address for current SIM instance. |
instance | module device instance |
bool SIM_HAL_GetI2cGateCmd | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function will get the clock gate state for I2C moudle.
base | Base address for current SIM instance. |
instance | module device instance |
void SIM_HAL_EnableUartClock | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function enables the clock for UART moudle.
base | Base address for current SIM instance. |
instance | module device instance |
void SIM_HAL_DisableUartClock | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function disables the clock for UART moudle.
base | Base address for current SIM instance. |
instance | module device instance |
bool SIM_HAL_GetUartGateCmd | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function will get the clock gate state for UART moudle.
base | Base address for current SIM instance. |
instance | module device instance |
void SIM_HAL_EnablePwmClock | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function enables the clock for eFlexPWM moudle.
base | Base address for current SIM instance. |
instance | module device instance |
void SIM_HAL_DisablePwmClock | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function disables the clock for eFlexPWM moudle.
base | Base address for current SIM instance. |
instance | module device instance |
bool SIM_HAL_GetPwmGateCmd | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function will get the clock gate state for eFlexPWM moudle.
base | Base address for current SIM instance. |
instance | module device instance |
void SIM_HAL_EnableAoiClock | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function enables the clock for AOI moudle.
base | Base address for current SIM instance. |
instance | module device instance |
void SIM_HAL_DisableAoiClock | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function disables the clock for AOI moudle.
base | Base address for current SIM instance. |
instance | module device instance |
bool SIM_HAL_GetAoiGateCmd | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function will get the clock gate state for AOI moudle.
base | Base address for current SIM instance. |
instance | module device instance |
void SIM_HAL_EnableXbarClock | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function enables the clock for XBAR moudle.
base | Base address for current SIM instance. |
instance | module device instance |
void SIM_HAL_DisableXbarClock | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function disables the clock for XBAR moudle.
base | Base address for current SIM instance. |
instance | module device instance |
bool SIM_HAL_GetXbarGateCmd | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function will get the clock gate state for XBAR moudle.
base | Base address for current SIM instance. |
instance | module device instance |
void SIM_HAL_EnableEncClock | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function enables the clock for ENC moudle.
base | Base address for current SIM instance. |
instance | module device instance |
void SIM_HAL_DisableEncClock | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function disables the clock for ENC moudle.
base | Base address for current SIM instance. |
instance | module device instance |
bool SIM_HAL_GetEncGateCmd | ( | SIM_Type * | base, |
uint32_t | instance | ||
) |
This function will get the clock gate state for ENC moudle.
base | Base address for current SIM instance. |
instance | module device instance |
|
inlinestatic |
This function sets the clock selection of ERCLK32K.
base | Base address for current SIM instance. |
setting | The value to set. |
|
inlinestatic |
This function gets the clock selection of ERCLK32K.
base | Base address for current SIM instance. |
|
inlinestatic |
This function sets debug trace clock selection.
base | Base address for current SIM instance. |
setting | The value to set. |
|
inlinestatic |
This function gets debug trace clock selection.
base | Base address for current SIM instance. |
|
inlinestatic |
This function sets Nanoedge clock selection.
base | Base address for current SIM instance. |
setting | The value to set. |
|
inlinestatic |
This function gets Nanoedge clock selection.
base | Base address for current SIM instance. |
|
inlinestatic |
This function gets Nanoedge power supply status.
base | Base address for current SIM instance. |
|
inlinestatic |
This function sets soft control to indicate nanoedge PMC is ready, when PMC Power dectect is disabled by SRPWRDETEN
base | Base address for current SIM instance. |
select | power supply status. |
|
inlinestatic |
This function gets soft control to indicate nanoedge PMC is ready.
base | Base address for current SIM instance. |
|
inlinestatic |
enable Nanoedge PMC power dectect to assert PMC ready signal when PMC is stable.
base | Base address for current SIM instance. |
|
inlinestatic |
disable Nanoedge PMC power dectect to assert PMC ready signal when PMC is stable.
base | Base address for current SIM instance. |
|
inlinestatic |
This function gets Nanoedge PMC power dectect to assert PMC ready signal when PMC is stable
base | Base address for current SIM instance. |
|
inlinestatic |
This function returns which clock is fed in ADC. 0 ADC clock is fast peripherial clock. 1 ADC clock is MCGIRCLK.
base | Base address for current SIM instance. |
|
inlinestatic |
Control ADC low current mode in STOP and VLPS mode.
base | Base address for current SIM instance. |
|
inlinestatic |
Control ADC low current mode in STOP and VLPS mode.
base | Base address for current SIM instance. |
|
inlinestatic |
This function gets ADC low current mode in STOP and VLPS mode.
base | Base address for current SIM instance. |