FLEXBUS HAL driver

Overview

The section describes the programming interface of the FLEXBUS HAL driver.

Files
file	fsl_flexbus_hal.h

Data Structures
struct	flexbus_user_config_t
	Configuration structure that the user needs to set. More...

Enumerations
enum	flexbus_status_t
	Flexbus status return codes. More...
enum	flexbus_port_size_t {   kFlexbus4bytes = 0x00U,   kFlexbus1byte = 0x01U,   kFlexbus2bytes = 0x02U }
	Defines port size for Flexbus peripheral. More...
enum	flexbus_write_address_hold_t {   kFlexbusHold1cycle = 0x00U,   kFlexbusHold2cycles = 0x01U,   kFlexbusHold3cycles = 0x02U,   kFlexbusHold4cycles = 0x03U }
	Defines number of cycles to hold address and attributes for Flexbus peripheral. More...
enum	flexbus_read_address_hold_t {   kFlexbusHold4or3cycles = 0x03U,   kFlexbusHold3or2cycles = 0x02U,   kFlexbusHold2or1cycle = 0x01U,   kFlexbusHold1or0cycle = 0x00U }
	Defines number of cycles to hold address and attributes for Flexbus peripheral. More...
enum	flexbus_address_setup_t {   kFlexbusFirstRisingEdge = 0x00U,   kFlexbusSecondRisingEdge = 0x01U,   kFlexbusThirdRisingEdge = 0x02U,   kFlexbusFourthRisingEdge = 0x03U }
	Address setup for Flexbus peripheral. More...
enum	flexbus_bytelane_shift_t {   kFlexbusNotShifted = 0x00U,   kFlexbusShifted = 0x01U }
	Defines byte-lane shift for Flexbus peripheral. More...
enum	flexbus_multiplex_group1_t {   kFlexbusMultiplexGroup1_FB_ALE = 0x00U,   kFlexbusMultiplexGroup1_FB_CS1 = 0x01U,   kFlexbusMultiplexGroup1_FB_TS = 0x02U }
	Defines multiplex group1 valid signals. More...
enum	flexbus_multiplex_group2_t {   kFlexbusMultiplexGroup2_FB_CS4 = 0x00U,   kFlexbusMultiplexGroup2_FB_TSIZ0 = 0x01U,   kFlexbusMultiplexGroup2_FB_BE_31_24 = 0x02U }
	Defines multiplex group2 valid signals. More...
enum	flexbus_multiplex_group3_t {   kFlexbusMultiplexGroup3_FB_CS5 = 0x00U,   kFlexbusMultiplexGroup3_FB_TSIZ1 = 0x01U,   kFlexbusMultiplexGroup3_FB_BE_23_16 = 0x02U }
	Defines multiplex group3 valid signals. More...
enum	flexbus_multiplex_group4_t {   kFlexbusMultiplexGroup4_FB_TBST = 0x00U,   kFlexbusMultiplexGroup4_FB_CS2 = 0x01U,   kFlexbusMultiplexGroup4_FB_BE_15_8 = 0x02U }
	Defines multiplex group4 valid signals. More...
enum	flexbus_multiplex_group5_t {   kFlexbusMultiplexGroup5_FB_TA = 0x00U,   kFlexbusMultiplexGroup5_FB_CS3 = 0x01U,   kFlexbusMultiplexGroup5_FB_BE_7_0 = 0x02U }
	Defines multiplex group5 valid signals. More...

Configuration
void	FLEXBUS_HAL_Init (FB_Type *base)
	Initialization to default values. More...
void	FLEXBUS_HAL_Configure (FB_Type *base, const flexbus_user_config_t *userConfigPtr)
	Configure to a known values. More...
static void	FLEXBUS_HAL_WriteAddr (FB_Type *base, uint8_t chip, uint16_t addr, uint16_t addrMask)
	Write chip-select base address. More...
static void	FLEXBUS_HAL_SetChipSelectValidCmd (FB_Type *base, uint8_t chip, bool valid)
	Sets chip-selects valid bit or not. More...
static void	FLEXBUS_HAL_SetWriteProtectionCmd (FB_Type *base, uint8_t chip, bool enable)
	Enables or disables write protection function for Flexbus. More...
static void	FLEXBUS_HAL_SetBurstWriteCmd (FB_Type *base, uint8_t chip, bool enable)
	Enables or disables burst-write on Flexbus. More...
static void	FLEXBUS_HAL_SetBurstReadCmd (FB_Type *base, uint8_t chip, bool enable)
	Enables or disables burst-read bit on Flexbus. More...
static void	FLEXBUS_HAL_SetByteModeCmd (FB_Type *base, uint8_t chip, bool enable)
	Enables or disables byte-enable support on Flexbus. More...
static void	FLEXBUS_HAL_SetPortSize (FB_Type *base, uint8_t chip, flexbus_port_size_t size)
	Sets port size on Flexbus. More...
static void	FLEXBUS_HAL_SetAutoAcknowledgeCmd (FB_Type *base, uint8_t chip, bool enable)
	Enables auto-acknowledge on Flexbus. More...
static void	FLEXBUS_HAL_SetByteLaneShift (FB_Type *base, uint8_t chip, flexbus_bytelane_shift_t shift)
	Enables byte-lane shift on Flexbus. More...
static void	FLEXBUS_HAL_SetWaitStates (FB_Type *base, uint8_t chip, uint8_t waitStates)
	Sets number of wait states on Flexbus. More...
static void	FLEXBUS_HAL_SetWriteAddrHoldOrDeselect (FB_Type *base, uint8_t chip, flexbus_write_address_hold_t addrHold)
	Sets write address hold or deselect. More...
static void	FLEXBUS_HAL_SetReadAddrHoldOrDeselect (FB_Type *base, uint8_t chip, flexbus_read_address_hold_t addrHold)
	Sets read address hold or deselect. More...
static void	FLEXBUS_HAL_SetAddrSetup (FB_Type *base, uint8_t chip, flexbus_address_setup_t delay)
	Set address setup. More...
static void	FLEXBUS_HAL_SetExtendedAddrLatchCmd (FB_Type *base, uint8_t chip, bool enable)
	Enables extended address latch. More...
static void	FLEXBUS_HAL_SetSecondaryWaitStateCmd (FB_Type *base, uint8_t chip, bool enable)
	Enables secondary wait state. More...
static void	FLEXBUS_HAL_SetMultiplexControlGroup1 (FB_Type *base, flexbus_multiplex_group1_t controls)
	Multiplex group1 set. More...
static flexbus_multiplex_group1_t	FLEXBUS_HAL_GetMultiplexControlGroup1 (FB_Type *base)
	Multiplex group1 get. More...
static void	FLEXBUS_HAL_SetMultiplexControlGroup2 (FB_Type *base, flexbus_multiplex_group2_t controls)
	Multiplex group2 set. More...
static flexbus_multiplex_group2_t	FLEXBUS_HAL_GetMultiplexControlGroup2 (FB_Type *base)
	Multiplex group2 get. More...
static void	FLEXBUS_HAL_SetMultiplexControlGroup3 (FB_Type *base, flexbus_multiplex_group3_t controls)
	Multiplex group3 set. More...
static flexbus_multiplex_group3_t	FLEXBUS_HAL_GetMultiplexControlGroup3 (FB_Type *base)
	Multiplex group3 get. More...
static void	FLEXBUS_HAL_SetMultiplexControlGroup4 (FB_Type *base, flexbus_multiplex_group4_t controls)
	Multiplex group4 set. More...
static flexbus_multiplex_group4_t	FLEXBUS_HAL_GetMultiplexControlGroup4 (FB_Type *base)
	Multiplex group4 get. More...
static void	FLEXBUS_HAL_SetMultiplexControlGroup5 (FB_Type *base, flexbus_multiplex_group5_t controls)
	Multiplex group5 set. More...
static flexbus_multiplex_group5_t	FLEXBUS_HAL_GetMultiplexControlGroup5 (FB_Type *base)
	Multiplex group5 get. More...

---

Data Structure Documentation

struct flexbus_user_config_t

Data Fields
uint8_t	chip
	Chip FlexBus for validation.
uint8_t	waitStates
	Value of wait states.
uint32_t	baseAddress
	Base address for using FlexBus.
uint32_t	baseAddressMask
	Base address mask.
bool	writeProtect
	Write protected.
bool	burstWrite
	Burst-Write enable.
bool	burstRead
	Burst-Read enable.
bool	byteEnableMode
	Byte-enable mode support.
bool	autoAcknowledge
	Auto acknowledge setting.
bool	extendTransferAddress
	Extend transfer start/extend address latch enable.
bool	secondaryWaitStates
	Secondary wait states number.
flexbus_port_size_t	portSize
	Port size of transfer.
flexbus_bytelane_shift_t	byteLaneShift
	Byte-lane shift enable.
flexbus_write_address_hold_t	writeAddressHold
	Write address hold or deselect option.
flexbus_read_address_hold_t	readAddressHold
	Read address hold or deselect option.
flexbus_address_setup_t	addressSetup
	Address setup setting.
flexbus_multiplex_group1_t	group1MultiplexControl
	FlexBus Signal Group 1 Multiplex control.
flexbus_multiplex_group2_t	group2MultiplexControl
	FlexBus Signal Group 2 Multiplex control.
flexbus_multiplex_group3_t	group3MultiplexControl
	FlexBus Signal Group 3 Multiplex control.
flexbus_multiplex_group4_t	group4MultiplexControl
	FlexBus Signal Group 4 Multiplex control.
flexbus_multiplex_group5_t	group5MultiplexControl
	FlexBus Signal Group 5 Multiplex control.

Enumeration Type Documentation

enum flexbus_status_t

enum flexbus_port_size_t

Enumerator
kFlexbus4bytes	32-bit port size
kFlexbus1byte	8-bit port size
kFlexbus2bytes	16-bit port size

enum flexbus_write_address_hold_t

Enumerator
kFlexbusHold1cycle	Hold address and attributes one cycle after FB_CSn negates on writes.
kFlexbusHold2cycles	Hold address and attributes two cycle after FB_CSn negates on writes.
kFlexbusHold3cycles	Hold address and attributes three cycle after FB_CSn negates on writes.
kFlexbusHold4cycles	Hold address and attributes four cycle after FB_CSn negates on writes.

enum flexbus_read_address_hold_t

Enumerator
kFlexbusHold4or3cycles	Hold address and attributes 4 or 3 cycles on reads.
kFlexbusHold3or2cycles	Hold address and attributes 3 or 2 cycles on reads.
kFlexbusHold2or1cycle	Hold address and attributes 2 or 1 cycles on reads.
kFlexbusHold1or0cycle	Hold address and attributes 1 or 0 cycles on reads.

enum flexbus_address_setup_t

Enumerator
kFlexbusFirstRisingEdge	Assert FB_CSn on first rising clock edge after address is asserted.
kFlexbusSecondRisingEdge	Assert FB_CSn on second rising clock edge after address is asserted.
kFlexbusThirdRisingEdge	Assert FB_CSn on third rising clock edge after address is asserted.
kFlexbusFourthRisingEdge	Assert FB_CSn on fourth rising clock edge after address is asserted.

enum flexbus_bytelane_shift_t

Enumerator
kFlexbusNotShifted	Not shifted. Data is left-justfied on FB_AD.
kFlexbusShifted	Shifted. Data is right justified on FB_AD.

enum flexbus_multiplex_group1_t

Enumerator
kFlexbusMultiplexGroup1_FB_ALE	FB_ALE.
kFlexbusMultiplexGroup1_FB_CS1	FB_CS1.
kFlexbusMultiplexGroup1_FB_TS	FB_TS.

enum flexbus_multiplex_group2_t

Enumerator
kFlexbusMultiplexGroup2_FB_CS4	FB_CS4.
kFlexbusMultiplexGroup2_FB_TSIZ0	FB_TSIZ0.
kFlexbusMultiplexGroup2_FB_BE_31_24	FB_BE_31_24.

enum flexbus_multiplex_group3_t

Enumerator
kFlexbusMultiplexGroup3_FB_CS5	FB_CS5.
kFlexbusMultiplexGroup3_FB_TSIZ1	FB_TSIZ1.
kFlexbusMultiplexGroup3_FB_BE_23_16	FB_BE_23_16.

enum flexbus_multiplex_group4_t

Enumerator
kFlexbusMultiplexGroup4_FB_TBST	FB_TBST.
kFlexbusMultiplexGroup4_FB_CS2	FB_CS2.
kFlexbusMultiplexGroup4_FB_BE_15_8	FB_BE_15_8.

enum flexbus_multiplex_group5_t

Enumerator
kFlexbusMultiplexGroup5_FB_TA	FB_TA.
kFlexbusMultiplexGroup5_FB_CS3	FB_CS3.
kFlexbusMultiplexGroup5_FB_BE_7_0	FB_BE_7_0.

Function Documentation

void FLEXBUS_HAL_Init

(

FB_Type *

base

)

Only chip 0 validated and set to known values. Other chips disabled.

Parameters

base	Flexbus module base number.

void FLEXBUS_HAL_Configure	(	FB_Type *	base,
		const flexbus_user_config_t *	userConfigPtr
	)

Parameters

base	Flexbus module base number.
userConfigPtr	Flexbus input user configuration

static void FLEXBUS_HAL_WriteAddr ( FB_Type *  base, uint8_t  chip, uint16_t  addr, uint16_t  addrMask  )

inlinestatic

The CSARn registers specify the chip-select base addresses. NOTE: Because the FlexBus module is one of the slaves connected to the crossbar switch, it is only accessible within a certain memory range. Refer to the device memory map for the applicable FlexBus "expansion" address range for which the chip-selects can be active. Set the CSARn registers appropriately.

Parameters

base	Flexbus module base number.
chip	Flexbus chip for validation.
addr	chip-select base address.
addrMask	chip-select base address mask.

static void FLEXBUS_HAL_SetChipSelectValidCmd ( FB_Type *  base, uint8_t  chip, bool  valid  )

inlinestatic

Indicates whether the corresponding CSAR, CSMR, and CSCR contents are valid. NOTE: At reset, no chip-select other than FB_CS0 can be used until the CSMR0[V] is set. Afterward, FB_CS[5:0] functions as programmed.

Parameters

base	Flexbus module base number.
chip	Flexbus chip for validation.
valid	Validation for chip-selects or not. true: chip-select is valid false: chip-select is invalid

static void FLEXBUS_HAL_SetWriteProtectionCmd ( FB_Type *  base, uint8_t  chip, bool  enable  )

inlinestatic

Controls write accesses to the address range in the corresponding CSAR. 0: Read and write accesses are allowed 1: Only read accesses are allowed

Parameters

base	Flexbus module base number.
chip	Flexbus chip for validation.
enable	Enables or disables write protection.

static void FLEXBUS_HAL_SetBurstWriteCmd ( FB_Type *  base, uint8_t  chip, bool  enable  )

inlinestatic

Specifies whether burst writes are used for memory associated with each FB_CSn.

0: Break data larger than the specified port size into individual, port-sized, non-burst writes. For example, a longword write to an 8-bit port takes four byte writes. 1: Enables burst write of data larger than the specified port size, including longword writes to 8 and 16-bit ports, word writes to 8-bit ports, and line writes to 8-, 16-, and 32-bit ports.

Parameters

base	Flexbus module base number.
chip	Flexbus chip for validation.
enable	Enables or disables burst-write.

static void FLEXBUS_HAL_SetBurstReadCmd ( FB_Type *  base, uint8_t  chip, bool  enable  )

inlinestatic

Specifies whether burst reads are used for memory associated with each FB_CSn.

0: Data exceeding the specified port size is broken into individual, port-sized, non-burst reads. For example, a longword read from an 8-bit port is broken into four 8-bit reads. 1: Enables data burst reads larger than the specified port size, including longword reads from 8- and 16-bit ports, word reads from 8-bit ports, and line reads from 8, 16-, and 32-bit ports.

Parameters

base	Flexbus module base number.
chip	Flexbus chip for validation.
enable	Enables or disables burst-read.

static void FLEXBUS_HAL_SetByteModeCmd ( FB_Type *  base, uint8_t  chip, bool  enable  )

inlinestatic

Specifies the byte enable operation. Certain memories have byte enables that must be asserted during reads and writes. BEM can be set in the relevant CSCR to provide the appropriate mode of byte enable support for these SRAMs.

The FB_BEn signals are asserted for read and write accesses.

Parameters

base	Flexbus module base number.
chip	Flexbus chip for validation.
enable	Enables or disables byte-enable support

static void FLEXBUS_HAL_SetPortSize ( FB_Type *  base, uint8_t  chip, flexbus_port_size_t  size  )

inlinestatic

Specifies the data port width associated with each chip-select. It determines where data is driven during write cycles and where data is sampled during read cycles.

Parameters

base	Flexbus module base number.
chip	Flexbus chip for validation.
size	Size of port.

static void FLEXBUS_HAL_SetAutoAcknowledgeCmd ( FB_Type *  base, uint8_t  chip, bool  enable  )

inlinestatic

Determines the assertion of the internal transfer acknowledge for accesses specified by the chip-select address.

NOTE: If AA is set for a corresponding FB_CSn and the external system asserts an external FB_TA before the wait-state countdown asserts the internal FB_TA, the cycle is terminated. Burst cycles increment the address bus between each internal termination. NOTE: This bit must be set if CSPMCR disables FB_TA.

enable value: 0: No internal FB_TA is asserted. Cycle is terminated externally 1: Internal transfer acknowledge is asserted as specified by WS

Parameters

base	Flexbus module base number.
chip	Flexbus chip for validation.
enable	Enables or disables Auto-acknowledge.

static void FLEXBUS_HAL_SetByteLaneShift ( FB_Type *  base, uint8_t  chip, flexbus_bytelane_shift_t  shift  )

inlinestatic

Determines if data on FB_AD appears left-justified or right-justified during the data phase of a FlexBus access.

0: Not shifted. Data is left-justfied on FB_AD. 1: Shifted. Data is right justified on FB_AD.

Parameters

base	Flexbus module base number.
chip	Flexbus chip for validation.
shift	Selects left-justified or right-justified data

static void FLEXBUS_HAL_SetWaitStates ( FB_Type *  base, uint8_t  chip, uint8_t  waitStates  )

inlinestatic

The number of wait states inserted after FB_CSn asserts and before an internal transfer acknowledge is generated (WS = 0 inserts zero wait states, WS = 0x3F inserts 63 wait states).

Parameters

base	Flexbus module base number.
chip	Flexbus chip for validation.
waitStates	Defines value of wait states

static void FLEXBUS_HAL_SetWriteAddrHoldOrDeselect ( FB_Type *  base, uint8_t  chip, flexbus_write_address_hold_t  addrHold  )

inlinestatic

Write address hold or deselect. This field controls the address, data, and attribute hold time after the termination of a write cycle that hits in the chip-select address space. NOTE: The hold time applies only at the end of a transfer. Therefore, during a burst transfer or a transfer to a port size smaller than the transfer size, the hold time is only added after the last bus cycle.

Parameters

base	Flexbus module base number.
chip	Flexbus chip for validation.
addrHold	Value of cycles to hold write address.

static void FLEXBUS_HAL_SetReadAddrHoldOrDeselect ( FB_Type *  base, uint8_t  chip, flexbus_read_address_hold_t  addrHold  )

inlinestatic

This field controls the address and attribute hold time after the termination during a read cycle that hits in the chip-select address space. NOTE: The hold time applies only at the end of a transfer. Therefore, during a burst transfer or a transfer to a port size smaller than the transfer size, the hold time is only added after the last bus cycle.

Parameters

base	Flexbus module base number.
chip	Flexbus chip for validation.
addrHold	Value of cycles to hold read address.

static void FLEXBUS_HAL_SetAddrSetup ( FB_Type *  base, uint8_t  chip, flexbus_address_setup_t  delay  )

inlinestatic

Controls the assertion of the chip-select with respect to assertion of a valid address and attributes. The address and attributes are considered valid at the same time FB_TS/FB_ALE asserts.

Parameters

base	Flexbus module base number.
chip	Flexbus chip for validation.
delay	Value of delay.

static void FLEXBUS_HAL_SetExtendedAddrLatchCmd ( FB_Type *  base, uint8_t  chip, bool  enable  )

inlinestatic

Extended address latch enable

0: FB_TS/FB_ALE asserts for one bus clock cycle. 1: FB_TS/FB_ALE remains asserted until the first positive clock edge after FB_CSn asserts.

Parameters

base	Flexbus module base number.
chip	Flexbus chip for validation.
enable	Enables or disables extended address latch.

static void FLEXBUS_HAL_SetSecondaryWaitStateCmd ( FB_Type *  base, uint8_t  chip, bool  enable  )

inlinestatic

Secondary wait state enable.

0: The WS value inserts wait states before an internal transfer acknowledge is generated for all transfers. 1: The SWS value inserts wait states before an internal transfer acknowledge is generated for burst transfer secondary terminations.

Parameters

base	Flexbus module base number.
chip	Flexbus chip for validation.
enable	Enables or disables wait state

static void FLEXBUS_HAL_SetMultiplexControlGroup1 ( FB_Type *  base, flexbus_multiplex_group1_t  controls  )

inlinestatic

GROUP1 Controls the multiplexing of the FB_ALE, FB_CS1 , and FB_TS signals.

Parameters

base	Flexbus module base number.
controls	Flexbus multiplex settings for Group1.

Returns

Flexbus status.

static flexbus_multiplex_group1_t FLEXBUS_HAL_GetMultiplexControlGroup1 ( FB_Type *  base )

inlinestatic

GROUP1 Controls the multiplexing of the FB_ALE, FB_CS1 , and FB_TS signals.

Parameters

base	Flexbus module base number.

Returns

Flexbus multiplex settings for Group1.

static void FLEXBUS_HAL_SetMultiplexControlGroup2 ( FB_Type *  base, flexbus_multiplex_group2_t  controls  )

inlinestatic

GROUP2 Controls the multiplexing of the FB_TA , FB_CS3 , and FB_BE_7_0 signals. When GROUP5 is not 0000b, you must write 1b to the CSCR[AA] bit. Otherwise, the bus hangs during a transfer.

Parameters

base	Flexbus module base number.
controls	Flexbus multiplex settings for Group2.

Returns

Flexbus status.

static flexbus_multiplex_group2_t FLEXBUS_HAL_GetMultiplexControlGroup2 ( FB_Type *  base )

inlinestatic

GROUP2 Controls the multiplexing of the FB_TA , FB_CS3 , and FB_BE_7_0 signals. When GROUP5 is not 0000b, you must write 1b to the CSCR[AA] bit. Otherwise, the bus hangs during a transfer.

Parameters

base	Flexbus module base number.

Returns

Flexbus multiplex settings for Group2.

static void FLEXBUS_HAL_SetMultiplexControlGroup3 ( FB_Type *  base, flexbus_multiplex_group3_t  controls  )

inlinestatic

GROUP3 Controls the multiplexing of the FB_CS4 , FB_TSIZ0, and FB_BE_31_24 signals.

Parameters

base	Flexbus module base number.
controls	Flexbus multiplex settings for Group3.

Returns

Flexbus status.

static flexbus_multiplex_group3_t FLEXBUS_HAL_GetMultiplexControlGroup3 ( FB_Type *  base )

inlinestatic

GROUP3 Controls the multiplexing of the FB_CS4 , FB_TSIZ0, and FB_BE_31_24 signals.

Parameters

base	Flexbus module base number.

Returns

Flexbus multiplex settings for Group3.

static void FLEXBUS_HAL_SetMultiplexControlGroup4 ( FB_Type *  base, flexbus_multiplex_group4_t  controls  )

inlinestatic

GROUP4 Controls the multiplexing of the FB_TBST, FB_CS2, and FB_BE_15_8 signals.

Parameters

base	Flexbus module base number.
controls	Flexbus multiplex settings for Group4.

Returns

Flexbus status.

static flexbus_multiplex_group4_t FLEXBUS_HAL_GetMultiplexControlGroup4 ( FB_Type *  base )

inlinestatic

GROUP4 Controls the multiplexing of the FB_TBST, FB_CS2, and FB_BE_15_8 signals.

Parameters

base	Flexbus module base number.

Returns

Flexbus multiplex settings for Group4.

static void FLEXBUS_HAL_SetMultiplexControlGroup5 ( FB_Type *  base, flexbus_multiplex_group5_t  controls  )

inlinestatic

GROUP5 Controls the multiplexing of the FB_TA, FB_CS3, and FB_BE_7_0 signals.

Parameters

base	Flexbus module base number.
controls	Flexbus multiplex settings for Group5.

Returns

Flexbus status.

static flexbus_multiplex_group5_t FLEXBUS_HAL_GetMultiplexControlGroup5 ( FB_Type *  base )

inlinestatic

GROUP5 Controls the multiplexing of the FB_TA, FB_CS3, and FB_BE_7_0 signals.

Parameters

base	Flexbus module base number.

Returns

Flexbus multiplex settings for Group5.