Overview

The section describes the programming interface of the MCG HAL driver. The multipurpose clock generator module provides several clock source choices for the MCU. The MCG HAL provides a set of APIs to access these registers, including these services:

OSC related APIs;
FLL reference clock source, divider and output frequency;
PLL reference clock source, divider and output frequency;
MCG mode related APIs;
MCG auto trim machine function;

OSC-related APIs

MCG uses the OSC as an external reference clock source. To use OSC, set RANGE, HGO, and EREFS correctly according to the board configuration. The functions CLOCK_HAL_SetOsc0Mode()/CLOCK_HAL_SetOsc1Mode() are used for this purpose.

The OSC frequency is saved in global variables g_xtal0ClkFreq, g_xtal1ClkFreq and g_xtalRtcClkFreq, which are used to calculate the MCG output frequency. Set these variables according to the board settings.
MCG provides monitor for each OSC. When the OSC clock is lost, the monitor triggers an interrupt or a system reset. To enable the OSC monitor, use functions CLOCK_HAL_EnableXXXMonitor(), where XXX is the OSC name, such as Osc0, Osc1, RtcOsc.
For multiple OSC instances, use the CLOCK_HAL_SetOscselMode() function to choose which OSC to use. The CLOCK_HAL_TestOscFreq() function tests different OSCs frequencies according to parameters.

FLL reference clock source, divider, and output frequency.

To use MCG FLL, ensure that the FLL reference clock, reference clock divider, and FLL DCO are configured correctly. The FLL reference clock divider FRDIV should configure the output reference clock in the range of 31.25 kHz to 39.0625 kHz. See the reference manual for more details. For ease-of-use, the function CLOCK_HAL_GetAvailableFrdiv() is used to get the proper FRDIV value.
MCG FLL uses either the internal clock or the external clock as a reference clock. When selecting the external clock, the CLOCK_HAL_TestFllExternalRefFreq() function calculates the PLL external reference clock frequency according to parameters. It is useful to validate the parameters before setting them to registers.
The CLOCK_HAL_GetFllRefClk() function returns the current FLL reference clock frequency. The function CLOCK_HAL_TestFllFreq() calculates the FLL output frequency based on the input reference clock frequency and the DCO settings. It can be used to validate the setting values before setting them to registers. The CLOCK_HAL_GetFllClk() function returns the current FLL frequency.

PLL reference clock source, divider and output frequency

The PLL uses OSC as an external reference clock. To use MCG PLL, ensure that the reference clock, PRDIV, and VDIV are set correctly.
The register bit fields PRDIV and VDIV can be configured to generate the desired output frequency. See the appropriate reference manual for more information about setting values. For ease-of-use, the MCG HAL driver provides a function CLOCK_HAL_CalculatePllDiv(). Based on the reference clock frequency and the desired output frequency, this function calculates the available PRDIV and VDIV value to ensure that the output frequency is as aligned as possible to the desired frequency.
The PLL can be enabled when the MCG is in FLL mode. Use the functions CLOCK_HAL_EnablePll0InFllMode() and CLOCK_HAL_EnablePll1InFllMode() to enable the PLL in FLL mode.
For some platforms, the PLL loss of lock can trigger system reset. Use the function CLOCK_HAL_SetPllLostLockResetCmd() to configure this feature.

MCG mode related APIs

MCG HAL driver provides functions for mode check and mode transition.
The CLOCK_HAL_GetMcgMode() function gets the current MCG mode according to the MCG internal register.
Mode transition functions are defined as CLOCK_HAL_SetXXXMode, where XXX is the target mode name. The key register bit fields such as PRDIV, VDIV, FRDIV, and DMX32 should be passed as parameters to set the MCG to a specific state. If these parameters are invalid or can't reach the target mode directly, an error is returned.
If the FLL is the target mode, applications should pass a delay function, which ensures that the FLL is stable after changing the reference clock, FRDIV, DMX32, and DRS. Check the appropriate datasheet for more information about delay times.

MCG auto trim machine(ATM) function

The auto trim machine automatically trims the MCG internal reference clock using an external reference clock. See the appropriate reference manual for more details.
The function CLOCK_HAL_TrimInternalRefClk() function trims the IRC clock to a desired frequency. The bus clock, in the range of 8-16 MHz, should be the only reference clock and the IRC should not be the MCGOUTCLK source. Otherwise, the ATM does not work and the function returns an error.
The MCG ATM has a flag, which indicates whether the trim fails or not. Use the functions CLOCK_HAL_IsAutoTrimMachineFailed() and CLOCK_HAL_ClearAutoTrimMachineFailed() to check and clear the flag.

Files
file	fsl_mcg_hal.h

Macros
#define	MCG_MODE_CHECK_PARAM 0
	Check parameter or not during MCG mode switching. More...

Enumerations
enum	_mcg_constant
	MCG constant definitions.

enum	mcg_fll_src_t { kMcgFllSrcExternal, kMcgFllSrcInternal }
	MCG internal reference clock source select. More...

enum	osc_range_t { kOscRangeLow, kOscRangeHigh, kOscRangeVeryHigh, kOscRangeVeryHigh1, kOscRangeLow, kOscRangeHigh, kOscRangeVeryHigh, kOscRangeVeryHigh1 }
	MCG OSC frequency range select. More...

enum	osc_gain_t { kOscGainLow, kOscGainHigh, kOscGainLow, kOscGainHigh }
	MCG high gain oscillator select. More...

enum	osc_src_t { kOscSrcExt, kOscSrcOsc, kOscSrcExt, kOscSrcOsc }
	MCG external reference clock select. More...

enum	mcg_irc_mode_t { kMcgIrcSlow, kMcgIrcFast }
	MCG internal reference clock select. More...

enum	mcg_dmx32_select_t { kMcgDmx32Default, kMcgDmx32Fine }
	MCG DCO Maximum Frequency with 32.768 kHz Reference. More...

enum	mcg_dco_range_select_t { kMcgDcoRangeSelLow, kMcgDcoRangeSelMid, kMcgDcoRangeSelMidHigh, kMcgDcoRangeSelHigh }
	MCG DCO range select. More...

enum	mcg_pll_ref_mode_t { kMcgPllRefOsc0, kMcgPllRefOsc1 }
	MCG PLL external reference clock select. More...

enum	mcg_clkout_src_t { kMcgClkOutSrcOut, kMcgClkOutSrcInternal, kMcgClkOutSrcExternal }
	MCGOUT clock source. More...

enum	mcg_clkout_stat_t { kMcgClkOutStatFll, kMcgClkOutStatInternal, kMcgClkOutStatExternal, kMcgClkOutStatPll }
	MCG clock mode status. More...

enum	mcg_atm_select_t { kMcgAtmSel32k, kMcgAtmSel4m }
	MCG Automatic Trim Machine Select. More...

enum	mcg_oscsel_select_t { kMcgOscselOsc, kMcgOscselRtc }
	MCG OSC Clock Select. More...

enum	mcg_osc_monitor_mode_t { kMcgOscMonitorInt, kMcgOscMonitorReset }
	MCG OSC monitor mode. More...

enum	mcg_pll_clk_select_t { kMcgPllClkSelPll0 }
	MCG PLLCS select. More...

enum	mcg_atm_error_t { kMcgAtmErrorNone, kMcgAtmErrorBusClockRange, kMcgAtmErrorDesireFreqRange, kMcgAtmErrorIrcUsed, kMcgAtmErrorTrimValueInvalid, kMcgAtmErrorHardwareFail }
	MCG auto trim machine error code. More...

enum	mcg_status_t { kStatus_MCG_Success = 0U, kStatus_MCG_Fail = 1U }
	MCG status. More...

enum	mcg_modes_t { kMcgModeFEI = 0x01 << 0U, kMcgModeFBI = 0x01 << 1U, kMcgModeBLPI = 0x01 << 2U, kMcgModeFEE = 0x01 << 3U, kMcgModeFBE = 0x01 << 4U, kMcgModeBLPE = 0x01 << 5U, kMcgModePBE = 0x01 << 6U, kMcgModePEE = 0x01 << 7U, kMcgModeSTOP = 0x01 << 8U, kMcgModeError = 0x01 << 9U }
	MCG mode definitions. More...

enum	mcg_mode_error_t { kMcgModeErrNone = 0x00U, kMcgModeErrModeUnreachable = 0x01U, kMcgModeErrOscFreqRange = 0x21U, kMcgModeErrIrcSlowRange = 0x31U, kMcgModeErrIrcFastRange = 0x32U, kMcgModeErrFllRefRange = 0x33U, kMcgModeErrFllFrdivRange = 0x34U, kMcgModeErrFllDrsRange = 0x35U, kMcgModeErrFllDmx32Range = 0x36U, kMcgModeErrPllPrdivRange = 0x41U, kMcgModeErrPllVdivRange = 0x42U, kMcgModeErrPllRefClkRange = 0x43U, kMcgModeErrPllLockBit = 0x44U, kMcgModeErrPllOutClkRange = 0x45U }
	MCG mode transition API error code definitions. More...

Functions
mcg_modes_t	CLOCK_HAL_GetMcgMode (MCG_Type *base)
	Gets the current MCG mode. More...

mcg_mode_error_t	CLOCK_HAL_SetFeiMode (MCG_Type base, mcg_dco_range_select_t drs, void(fllStableDelay)(void))
	Sets the MCG to FEI mode. More...

mcg_mode_error_t	CLOCK_HAL_SetFeeMode (MCG_Type base, mcg_oscsel_select_t oscselVal, uint8_t frdivVal, mcg_dmx32_select_t dmx32, mcg_dco_range_select_t drs, void(fllStableDelay)(void))
	Sets the MCG to FEE mode. More...

mcg_mode_error_t	CLOCK_HAL_SetFbiMode (MCG_Type base, mcg_dco_range_select_t drs, mcg_irc_mode_t ircSelect, uint8_t fcrdivVal, void(fllStableDelay)(void))
	Sets the MCG to FBI mode. More...

mcg_mode_error_t	CLOCK_HAL_SetFbeMode (MCG_Type base, mcg_oscsel_select_t oscselVal, uint8_t frdivVal, mcg_dmx32_select_t dmx32, mcg_dco_range_select_t drs, void(fllStableDelay)(void))
	Sets the MCG to FBE mode. More...

mcg_mode_error_t	CLOCK_HAL_SetBlpiMode (MCG_Type *base, uint8_t fcrdivVal, mcg_irc_mode_t ircSelect)
	Sets the MCG to BLPI mode. More...

mcg_mode_error_t	CLOCK_HAL_SetBlpeMode (MCG_Type *base, mcg_oscsel_select_t oscselVal)
	Sets the MCG to BLPE mode. More...

mcg_mode_error_t	CLOCK_HAL_SetPbeMode (MCG_Type *base, mcg_oscsel_select_t oscselVal, mcg_pll_clk_select_t pllcsSelect, uint8_t prdivVal, uint8_t vdivVal)
	Sets the MCG to PBE mode. More...

mcg_mode_error_t	CLOCK_HAL_SetPeeMode (MCG_Type *base)
	Sets the MCG to PBE mode. More...

MCG out clock access API
uint32_t	CLOCK_HAL_TestOscFreq (MCG_Type *base, mcg_oscsel_select_t oscselVal)
	Tests the external clock frequency. More...

uint32_t	CLOCK_HAL_TestFllExternalRefFreq (MCG_Type *base, uint32_t extFreq, uint8_t frdivVal, osc_range_t range0, mcg_oscsel_select_t oscsel)
	Tests the FLL external reference frequency based on the input parameters. More...

uint32_t	CLOCK_HAL_GetFllRefClk (MCG_Type *base)
	Gets the current MCG FLL clock. More...

uint32_t	CLOCK_HAL_TestFllFreq (MCG_Type *base, uint32_t fllRef, mcg_dmx32_select_t dmx32, mcg_dco_range_select_t drs)
	Calculates the FLL frequency based on the input parameters. More...

uint32_t	CLOCK_HAL_GetFllClk (MCG_Type *base)
	Gets the current MCG FLL clock. More...

uint32_t	CLOCK_HAL_GetInternalRefClk (MCG_Type *base)
	Gets the current MCG internal reference clock(MCGIRCLK). More...

uint32_t	CLOCK_HAL_GetFixedFreqClk (MCG_Type *base)
	Gets the current MCG fixed frequency clock(MCGFFCLK). More...

uint32_t	CLOCK_HAL_GetOutClk (MCG_Type *base)
	Gets the current MCG out clock. More...

MCG control register access API
static void	CLOCK_HAL_SetClkOutSrc (MCG_Type *base, mcg_clkout_src_t select)
	Sets the Clock Source Select. More...

static void	CLOCK_HAL_SetClksFrdivIrefs (MCG_Type *base, mcg_clkout_src_t clks, uint8_t frdiv, mcg_fll_src_t irefs)
	Sets the CLKS, FRDIV, IREFS at the same time. More...

static mcg_clkout_stat_t	CLOCK_HAL_GetClkOutStat (MCG_Type *base)
	Gets the Clock Mode Status. More...

static void	CLOCK_HAL_SetLowPowerModeCmd (MCG_Type *base, bool enable)
	Sets the Low Power Select. More...

void	CLOCK_HAL_PrepareOsc (MCG_Type *base, mcg_oscsel_select_t setting)
	Prepare the OSC external clock. More...

MCG FLL API
static mcg_fll_src_t	CLOCK_HAL_GetFllSrc (MCG_Type *base)
	Gets the FLL source status. More...

static void	CLOCK_HAL_SetFllFilterPreserveCmd (MCG_Type *base, bool enable)
	Sets the FLL Filter Preserve Enable Setting. More...

mcg_status_t	CLOCK_HAL_GetAvailableFrdiv (osc_range_t range0, mcg_oscsel_select_t oscsel, uint32_t inputFreq, uint8_t *frdiv)
	Calculates the proper FRDIV setting. More...

MCG internal reference clock APIs
static void	CLOCK_HAL_SetInternalRefClkEnableCmd (MCG_Type *base, bool enable)
	Sets the internal reference clock enable or not. More...

static void	CLOCK_HAL_SetInternalRefClkEnableInStopCmd (MCG_Type *base, bool enable)
	Sets the internal reference clock enable or nor in stop mode. More...

static void	CLOCK_HAL_SetInternalRefClkMode (MCG_Type *base, mcg_irc_mode_t mode)
	Sets the Internal Reference Clock Select. More...

static mcg_irc_mode_t	CLOCK_HAL_GetInternalRefClkMode (MCG_Type *base)
	Gets the Internal Reference Clock Status. More...

void	CLOCK_HAL_UpdateFastClkInternalRefDiv (MCG_Type *base, uint8_t fcrdiv)
	Updates the Fast Clock Internal Reference Divider Setting. More...

void	CLOCK_HAL_UpdateInternalRefClk (MCG_Type *base, mcg_irc_mode_t ircs, uint8_t fcrdiv, bool enableInStop)
	Updates the Internal Reference clock (MCGIRCLK) More...

MCG OSC APIs
void	CLOCK_HAL_SetOsc0Mode (MCG_Type *base, osc_range_t range, osc_gain_t hgo, osc_src_t erefs)
	Sets the OSC0 work mode. More...

static bool	CLOCK_HAL_IsOsc0Stable (MCG_Type *base)
	Gets the OSC initialization status. More...

void	CLOCK_HAL_EnableOsc0Monitor (MCG_Type *base, mcg_osc_monitor_mode_t mode)
	Enables the OSC0 external clock monitor. More...

static void	CLOCK_HAL_DisableOsc0Monitor (MCG_Type *base)
	Disables the OSC0 external clock monitor. More...

static bool	CLOCK_HAL_IsOsc0MonitorEnabled (MCG_Type *base)
	Checks the OSC0 external clock monitor is enabled or not. More...

static bool	CLOCK_HAL_IsOsc0LostLock (MCG_Type *base)
	Gets the OSC0 Loss of Clock Status. More...

static void	CLOCK_HAL_ClearOsc0LostLock (MCG_Type *base)
	Clears the OSC0 Loss of Clock Status. More...

MCG Auto Trim Machine (ATM)
mcg_atm_error_t	CLOCK_HAL_TrimInternalRefClk (MCG_Type base, uint32_t extFreq, uint32_t desireFreq, uint32_t actualFreq, mcg_atm_select_t atms)
	Auto trims the internal reference clock. More...

static bool	CLOCK_HAL_IsAutoTrimMachineFailed (MCG_Type *base)
	Gets the Automatic Trim machine Fail Flag. More...

static void	CLOCK_HAL_ClearAutoTrimMachineFailed (MCG_Type *base)
	Clears the Automatic Trim machine Fail Flag. More...

Macro Definition Documentation

#define MCG_MODE_CHECK_PARAM 0

It is recommend to enable this macro when debug. After debug, disable this macro for code size optimization.

Enumeration Type Documentation

enum mcg_fll_src_t

Enumerator
kMcgFllSrcExternal	External reference clock is selected.
kMcgFllSrcInternal	The slow internal reference clock is selected.

enum osc_range_t

Enumerator
kOscRangeLow	Low frequency range selected for the crystal OSC.
kOscRangeHigh	High frequency range selected for the crystal OSC.
kOscRangeVeryHigh	Very High frequency range selected for the crystal OSC.
kOscRangeVeryHigh1	Very High frequency range selected for the crystal OSC.
kOscRangeLow	Low frequency range selected for the crystal OSC.
kOscRangeHigh	High frequency range selected for the crystal OSC.
kOscRangeVeryHigh	Very High frequency range selected for the crystal OSC.
kOscRangeVeryHigh1	Very High frequency range selected for the crystal OSC.

enum osc_gain_t

Enumerator
kOscGainLow	Configure crystal oscillator for low-power operation.
kOscGainHigh	Configure crystal oscillator for high-gain operation.
kOscGainLow	Configure crystal oscillator for low-power operation.
kOscGainHigh	Configure crystal oscillator for high-gain operation.

enum osc_src_t

Enumerator
kOscSrcExt	External reference clock requested.
kOscSrcOsc	Oscillator requested.
kOscSrcExt	Selects external input clock.
kOscSrcOsc	Selects Oscillator.

enum mcg_irc_mode_t

Enumerator
kMcgIrcSlow	Slow internal reference clock selected.
kMcgIrcFast	Fast internal reference clock selected.

enum mcg_dmx32_select_t

Enumerator
kMcgDmx32Default	DCO has a default range of 25%.
kMcgDmx32Fine	DCO is fine-tuned for maximum frequency with 32.768 kHz reference.

enum mcg_dco_range_select_t

Enumerator
kMcgDcoRangeSelLow	Low frequency range.
kMcgDcoRangeSelMid	Mid frequency range.
kMcgDcoRangeSelMidHigh	Mid-High frequency range.
kMcgDcoRangeSelHigh	High frequency range.

enum mcg_pll_ref_mode_t

Enumerator
kMcgPllRefOsc0	Selects OSC0 clock source as its external reference clock.
kMcgPllRefOsc1	Selects OSC1 clock source as its external reference clock.

enum mcg_clkout_src_t

Enumerator
kMcgClkOutSrcOut	Output of the FLL is selected (reset default)
kMcgClkOutSrcInternal	Internal reference clock is selected.
kMcgClkOutSrcExternal	External reference clock is selected.

enum mcg_clkout_stat_t

Enumerator
kMcgClkOutStatFll	Output of the FLL is selected (reset default)
kMcgClkOutStatInternal	Internal reference clock is selected.
kMcgClkOutStatExternal	External reference clock is selected.
kMcgClkOutStatPll	Output of the PLL is selected.

enum mcg_atm_select_t

Enumerator
kMcgAtmSel32k	32 kHz Internal Reference Clock selected
kMcgAtmSel4m	4 MHz Internal Reference Clock selected

enum mcg_oscsel_select_t

Enumerator
kMcgOscselOsc	Selects System Oscillator (OSCCLK)
kMcgOscselRtc	Selects 32 kHz RTC Oscillator.

enum mcg_osc_monitor_mode_t

Enumerator
kMcgOscMonitorInt	Generate interrupt when clock lost.
kMcgOscMonitorReset	Generate reset when clock lost.

enum mcg_pll_clk_select_t

Enumerator
kMcgPllClkSelPll0	PLL0 output clock is selected.

enum mcg_atm_error_t

Enumerator
kMcgAtmErrorNone	No error.
kMcgAtmErrorBusClockRange	Bus clock frequency is not in 8MHz to 16 MHz.
kMcgAtmErrorDesireFreqRange	Desired frequency is out of range.
kMcgAtmErrorIrcUsed	IRC clock is used to generate system clock.
kMcgAtmErrorTrimValueInvalid	The auto trim compare value ACT is invalid.
kMcgAtmErrorHardwareFail	ATC[ATMF] fail flag asserts.

enum mcg_status_t

Enumerator
kStatus_MCG_Success	Success.
kStatus_MCG_Fail	Execution failed.

enum mcg_modes_t

Enumerator
kMcgModeFEI	FEI - FLL Engaged Internal.
kMcgModeFBI	FBI - FLL Bypassed Internal.
kMcgModeBLPI	BLPI - Bypassed Low Power Internal.
kMcgModeFEE	FEE - FLL Engaged External.
kMcgModeFBE	FBE - FLL Bypassed External.
kMcgModeBLPE	BLPE - Bypassed Low Power External.
kMcgModePBE	PBE - PLL Bypassed External.
kMcgModePEE	PEE - PLL Engaged External.
kMcgModeSTOP	STOP - Stop.
kMcgModeError	Unknown mode.

enum mcg_mode_error_t

Enumerator
kMcgModeErrNone	No error.
kMcgModeErrModeUnreachable	Target mode is unreachable.
kMcgModeErrOscFreqRange	OSC frequency is invalid.
kMcgModeErrIrcSlowRange	Slow IRC is outside the allowed range.
kMcgModeErrIrcFastRange	Fast IRC is outside the allowed range.
kMcgModeErrFllRefRange	FLL reference frequency is outside the allowed range.
kMcgModeErrFllFrdivRange	FRDIV outside allowed range.
kMcgModeErrFllDrsRange	DRS is out of range.
kMcgModeErrFllDmx32Range	DMX32 setting not allowed.
kMcgModeErrPllPrdivRange	PRDIV outside allowed range.
kMcgModeErrPllVdivRange	VDIV outside allowed range.
kMcgModeErrPllRefClkRange	PLL reference clock frequency, out of range.
kMcgModeErrPllLockBit	LOCK or LOCK2 bit did not set.
kMcgModeErrPllOutClkRange	PLL output frequency is outside allowed range.

Function Documentation

uint32_t CLOCK_HAL_TestOscFreq	(	MCG_Type *	base,
		mcg_oscsel_select_t	oscselVal
	)

This function tests the external clock frequency, including OSC, RTC and IRC48M. If the OSC is not initialized, this function returns 0.

Parameters

base	Base address for current MCG instance.
oscselVal	External OSC selection.

Returns: MCG external reference clock frequency.

uint32_t CLOCK_HAL_TestFllExternalRefFreq	(	MCG_Type *	base,
		uint32_t	extFreq,
		uint8_t	frdivVal,
		osc_range_t	range0,
		mcg_oscsel_select_t	oscsel
	)

This function calculates the MCG FLL external reference clock value in frequency(Hertz) based on the input parameters.

Parameters

base	Base address for current MCG instance.
extFreq	External OSC frequency.
frdivVal	FLL external reference divider value (FRDIV).
range0	OSC0 frequency range selection.
oscsel	External OSC selection.

Returns: MCG FLL external reference clock frequency.

uint32_t CLOCK_HAL_GetFllRefClk ( MCG_Type * base )

This function returns the FLL reference clock frequency based on the current MCG configurations and settings. FLL should be properly configured in order to get the valid value.

Parameters

base	Base address for current MCG instance.

Returns: Frequency value in Hertz of FLL reference clock.

uint32_t CLOCK_HAL_TestFllFreq	(	MCG_Type *	base,
		uint32_t	fllRef,
		mcg_dmx32_select_t	dmx32,
		mcg_dco_range_select_t	drs
	)

This function calculates the FLL frequency based on input parameters.

Parameters

base	Base address for current MCG instance.
fllRef	FLL reference clock frequency.
dmx32	DCO max 32K setting.
drs	DCO range seletion.

Returns: Frequency value in Hertz of the mcgfllclk.

uint32_t CLOCK_HAL_GetFllClk ( MCG_Type * base )

This function returns the mcgfllclk value in frequency(Hertz) based on the current MCG configurations and settings. FLL should be properly configured get the valid value.

Parameters

base	Base address for current MCG instance.

Returns: Frequency value in Hertz of the mcgpllclk.

uint32_t CLOCK_HAL_GetInternalRefClk ( MCG_Type * base )

This function returns the MCGIRCLK value in frequency (Hertz) based on the current MCG configurations and settings. It does not check if the MCGIRCLK is enabled or not, just calculate and return the value.

Parameters

base	Base address for current MCG instance.

Returns: Frequency value in Hertz of the MCGIRCLK.

uint32_t CLOCK_HAL_GetFixedFreqClk ( MCG_Type * base )

This function get the MCGFFCLK, it is only valid when its frequency is not more than MCGOUTCLK/8. If MCGFFCLK is invalid, this function returns 0.

Parameters

base	Base address for current MCG instance.

Returns: Frequency value in Hertz of MCGFFCLK.

uint32_t CLOCK_HAL_GetOutClk ( MCG_Type * base )

This function returns the mcgoutclk value in frequency (Hertz) based on the current MCG configurations and settings. The configuration should be properly done in order to get the valid value.

Parameters

base	Base address for current MCG instance.

Returns: Frequency value in Hertz of mcgoutclk.

static void CLOCK_HAL_SetClkOutSrc	(	MCG_Type *	base,
		mcg_clkout_src_t	select
	)

inlinestatic

This function selects the clock source for the MCGOUTCLK.

Parameters

base	Base address for current MCG instance.
select	Clock source selection 00: Output of FLL or PLLCS is selected(depends on PLLS control bit) 01: Internal reference clock is selected. 10: External reference clock is selected. 11: Reserved.

static void CLOCK_HAL_SetClksFrdivIrefs	(	MCG_Type *	base,
		mcg_clkout_src_t	clks,
		uint8_t	frdiv,
		mcg_fll_src_t	irefs
	)

inlinestatic

This function set the MCG_C1[CLKS], MCG_C1[FRDIV] and MCG_C1[IREFS] at the same time, in order keep the integrity of the clock switching.

Parameters

base	Base address for current MCG instance.
clks	MCG_C1[CLKS].
frdiv	MCG_C1[FRDIV].
irefs	MCG_C1[IREFS].

static mcg_clkout_stat_t CLOCK_HAL_GetClkOutStat ( MCG_Type * base )

inlinestatic

This function gets the Clock Mode Status. These bits indicate the current clock mode. The CLKST bits do not update immediately after a write to the CLKS bits due to internal synchronization between clock domains.

Parameters

base	Base address for current MCG instance.

Returns

Clock Mode Status

00: Output of the FLL is selected (reset default).
01: Internal reference clock is selected.
10: External reference clock is selected.
11: Output of the PLL is selected.

static void CLOCK_HAL_SetLowPowerModeCmd	(	MCG_Type *	base,
		bool	enable
	)

inlinestatic

This function controls whether the FLL (or PLL) is disabled in the BLPI and the BLPE modes. In the FBE or the PBE modes, setting this bit to 1 transitions the MCG into the BLPE mode. In the FBI mode, setting this bit to 1 transitions the MCG into the BLPI mode. In any other MCG mode, the LP bit has no effect.

Parameters

base	Base address for current MCG instance.
enable	Enable low power or not: true: FLL (or PLL) is not disabled in bypass modes false: FLL (or PLL) is disabled in bypass modes (lower power)

void CLOCK_HAL_PrepareOsc	(	MCG_Type *	base,
		mcg_oscsel_select_t	setting
	)

This function set the OSCSEL, if external oscillator is used, it wait until it is stable. This function could be used to prepare the external clock source before switch to use.

Parameters

base	Base address for current MCG instance.
setting	MCG OSC Clock Select Setting

static mcg_fll_src_t CLOCK_HAL_GetFllSrc ( MCG_Type * base )

inlinestatic

This function gets the Internal Reference Status. This bit indicates the current source for the FLL reference clock. The IREFST bit does not update immediately after a write to the IREFS bit due to internal synchronization between the clock domains.

Parameters

base	Base address for current MCG instance.

Returns

Internal Reference Status

0: Source of FLL reference clock is the external reference clock.
1: Source of FLL reference clock is the internal reference clock.

static void CLOCK_HAL_SetFllFilterPreserveCmd	(	MCG_Type *	base,
		bool	enable
	)

inlinestatic

This function sets the FLL Filter Preserve Enable. This bit prevents the FLL filter values from resetting allowing the FLL output frequency to remain the same during the clock mode changes where the FLL/DCO output is still valid. (Note: This requires that the FLL reference frequency remain the same as the value prior to the new clock mode switch. Otherwise, the FLL filter and the frequency values change.)

Parameters

base	Base address for current MCG instance.
enable	FLL Filter Preserve Enable Setting true: FLL filter and FLL frequency retain their previous values during new clock mode change false: FLL filter and FLL frequency will reset on changes to correct clock mode

mcg_status_t CLOCK_HAL_GetAvailableFrdiv	(	osc_range_t	range0,
		mcg_oscsel_select_t	oscsel,
		uint32_t	inputFreq,
		uint8_t *	frdiv
	)

This function calculates the proper FRDIV setting according to the FLL reference clock. FLL reference clock frequency after FRDIV must be in the range of 31.25 kHz to 39.0625 kHz.

Parameters

range0	RANGE0 setting.
oscsel	OSCSEL setting.
inputFreq	The reference clock frequency before FRDIV.
frdiv	FRDIV result.

Returns: Method return status.

Return values

kStatus_MCG_Success	Proper FRDIV is got.
kStatus_MCG_Fail	Could not get proper FRDIV.

static void CLOCK_HAL_SetInternalRefClkEnableCmd	(	MCG_Type *	base,
		bool	enable
	)

inlinestatic

This function enables/disables the internal reference clock to use as the MCGIRCLK.

Parameters

base	Base address for current MCG instance.
enable	Enable or disable internal reference clock. true: MCGIRCLK active false: MCGIRCLK inactive

static void CLOCK_HAL_SetInternalRefClkEnableInStopCmd	(	MCG_Type *	base,
		bool	enable
	)

inlinestatic

This function controls whether or not the internal reference clock remains enabled when the MCG enters Stop mode.

Parameters

base	Base address for current MCG instance.
enable	Enable or disable the internal reference clock stop setting. true: Internal reference clock is enabled in Stop mode if IRCLKEN is set or if MCG is in FEI, FBI, or BLPI modes before entering Stop mode. false: Internal reference clock is disabled in Stop mode

static void CLOCK_HAL_SetInternalRefClkMode	(	MCG_Type *	base,
		mcg_irc_mode_t	mode
	)

inlinestatic

This function selects between the fast or slow internal reference clock source.

Parameters

base	Base address for current MCG instance.
mode	Internal reference clock source. 0: Slow internal reference clock selected. 1: Fast internal reference clock selected.

static mcg_irc_mode_t CLOCK_HAL_GetInternalRefClkMode ( MCG_Type * base )

inlinestatic

This function gets the Internal Reference Clock Status. The IRCST bit indicates the current source for the internal reference clock select clock (IRCSCLK). The IRCST bit does not update immediately after a write to the IRCS bit due to the internal synchronization between clock domains. The IRCST bit is only updated if the internal reference clock is enabled, either by the MCG being in a mode that uses the IRC or by setting the C1[IRCLKEN] bit.

Parameters

base	Base address for current MCG instance.

Returns

Internal Reference Clock Status

0: Source of internal reference clock is the slow clock (32 kHz IRC).
1: Source of internal reference clock is the fast clock (2 MHz IRC).

void CLOCK_HAL_UpdateFastClkInternalRefDiv	(	MCG_Type *	base,
		uint8_t	fcrdiv
	)

This function sets FCRDIV to a new value. FCRDIV cannot be changed when fast internal reference is enabled. If it is enabled, disable it , then set FCRDIV, and finally re enable it.

Parameters

base	Base address for current MCG instance.
fcrdiv	Fast Clock Internal Reference Divider Setting

void CLOCK_HAL_UpdateInternalRefClk	(	MCG_Type *	base,
		mcg_irc_mode_t	ircs,
		uint8_t	fcrdiv,
		bool	enableInStop
	)

This function setups the MCGIRCLK base on parameters. It selects the IRC source, if fast IRC is used, this function also sets the fast IRC divider. This function also sets whether enable MCGIRCLK in stop mode.

Parameters

base	Base address for current MCG instance.
ircs	MCGIRCLK clock source, choose fast or slow.
fcrdiv	Fast Clock Internal Reference Divider Setting.
enableInStop	MCGIRCLK enable in stop mode or not.

void CLOCK_HAL_SetOsc0Mode	(	MCG_Type *	base,
		osc_range_t	range,
		osc_gain_t	hgo,
		osc_src_t	erefs
	)

This function sets the OSC0 work mode, include frequency range select, high gain oscillator select, and external reference select.

Parameters

base	Base address for current MCG instance.
range	Frequency range select.
hgo	High gain oscillator select.
erefs	External reference select.

static bool CLOCK_HAL_IsOsc0Stable ( MCG_Type * base )

inlinestatic

This function gets the OSC Initialization Status. This bit, which resets to 0, is set to 1 after the initialization cycles of the crystal oscillator clock have completed. After being set, the bit is cleared to 0 if the OSC is subsequently disabled. See the OSC module's detailed description for more information.

Parameters

base	Base address for current MCG instance.

Returns: True if OSC0 is stable.

void CLOCK_HAL_EnableOsc0Monitor	(	MCG_Type *	base,
		mcg_osc_monitor_mode_t	mode
	)

This function enables the loss of clock monitoring circuit for the OSC0 external reference mux select. The monitor mode determines whether an interrupt or a reset request is generated following a loss of the OSC0 indication. External clock monitor should only be enabled when the MCG is in an operational mode that uses the external clock (FEE, FBE, PEE, PBE, or BLPE). Whenever the monitor is enabled, the value of the RANGE0 bits in the C2 register should not be changed. External clock monitor should be disabled before the MCG enters any Stop mode. Otherwise, a reset request may occur while in Stop mode. External clock monitor should also be disabled before entering VLPR or VLPW power modes if the MCG is in BLPE mode.

Parameters

base	Base address for current MCG instance.
mode	Generate interrupt or reset when OSC loss detected.

static void CLOCK_HAL_DisableOsc0Monitor ( MCG_Type * base )

inlinestatic

This function disables the loss of clock monitoring circuit for the OSC0 external reference mux select.

Parameters

base	Base address for current MCG instance.

static bool CLOCK_HAL_IsOsc0MonitorEnabled ( MCG_Type * base )

inlinestatic

This function checks whether the loss of clock monitoring circuit for the OSC0 external reference mux select is enabled or not.

Parameters

base	Base address for current MCG instance.

Returns: True if monitor is enabled.

static bool CLOCK_HAL_IsOsc0LostLock ( MCG_Type * base )

inlinestatic

This function gets the OSC0 Loss of Clock Status. The LOCS0 indicates when a loss of OSC0 reference clock has occurred. The LOCS0 bit only has an effect when CME0 is set.

Parameters

base	Base address for current MCG instance.

Returns: True if loss of OSC0 has occurred.

static void CLOCK_HAL_ClearOsc0LostLock ( MCG_Type * base )

inlinestatic

This function clears the OSC0 Loss of Clock Status.

Parameters

base	Base address for current MCG instance.

mcg_atm_error_t CLOCK_HAL_TrimInternalRefClk	(	MCG_Type *	base,
		uint32_t	extFreq,
		uint32_t	desireFreq,
		uint32_t *	actualFreq,
		mcg_atm_select_t	atms
	)

This function trims the internal reference clock using external clock. If successful, it returns the kMcgAtmErrorNone and the frequency after trimming is received in the parameter actualFreq. If an error occurs, the error code is returned.

Parameters

base	Base address for current MCG instance.
extFreq	External clock frequency, should be bus clock.
desireFreq	Frequency want to trim to.
actualFreq	Actual frequency after trim.
atms	Trim fast or slow internal reference clock.

Returns: Return kMcgAtmErrorNone if success, otherwise return error code.

static bool CLOCK_HAL_IsAutoTrimMachineFailed ( MCG_Type * base )

inlinestatic

This function gets the Automatic Trim machine Fail Flag. This bit asserts when the Automatic Trim Machine is enabled (ATME=1) and a write to the C1, C3, C4, and SC registers is detected or the MCG enters into a Stop mode. Writing to ATMF clears the flag.

Parameters

base	Base address for current MCG instance.

Returns: True if ATM failed.

static void CLOCK_HAL_ClearAutoTrimMachineFailed ( MCG_Type * base )

inlinestatic

This function clears the Automatic Trim machine Fail Flag.

Parameters

base	Base address for current MCG instance.

mcg_modes_t CLOCK_HAL_GetMcgMode ( MCG_Type * base )

This function checks the MCG registers and determine current MCG mode.

Parameters

base	Base address for current MCG instance.

Returns: Current MCG mode or error code mcg_modes_t

mcg_mode_error_t CLOCK_HAL_SetFeiMode	(	MCG_Type *	base,
		mcg_dco_range_select_t	drs,
		void(*)(void)	fllStableDelay
	)

This function sets the MCG to FEI mode.

Parameters

base	Base address for current MCG instance.
drs	The DCO range selection.
fllStableDelay	Delay function to make sure FLL is stable.

Returns: Error code

mcg_mode_error_t CLOCK_HAL_SetFeeMode	(	MCG_Type *	base,
		mcg_oscsel_select_t	oscselVal,
		uint8_t	frdivVal,
		mcg_dmx32_select_t	dmx32,
		mcg_dco_range_select_t	drs,
		void(*)(void)	fllStableDelay
	)

This function sets the MCG to FEE mode.

Parameters

base	Base address for current MCG instance.
oscselval	OSCSEL in FEE mode.
frdivVal	FRDIV in FEE mode.
dmx32	DMX32 in FEE mode.
drs	The DCO range selection.
fllStableDelay	Delay function to make sure FLL is stable.

Returns: Error code

mcg_mode_error_t CLOCK_HAL_SetFbiMode	(	MCG_Type *	base,
		mcg_dco_range_select_t	drs,
		mcg_irc_mode_t	ircSelect,
		uint8_t	fcrdivVal,
		void(*)(void)	fllStableDelay
	)

This function sets the MCG to FBI mode.

Parameters

base	Base address for current MCG instance.
drs	The DCO range selection.
ircselect	The internal reference clock to select.
fllStableDelay	Delay function to make sure FLL is stable.

Returns: Error code

mcg_mode_error_t CLOCK_HAL_SetFbeMode	(	MCG_Type *	base,
		mcg_oscsel_select_t	oscselVal,
		uint8_t	frdivVal,
		mcg_dmx32_select_t	dmx32,
		mcg_dco_range_select_t	drs,
		void(*)(void)	fllStableDelay
	)

This function sets the MCG to FBE mode.

Parameters

base	Base address for current MCG instance.
oscselval	OSCSEL in FEE mode.
frdivVal	FRDIV in FEE mode.
dmx32	DMX32 in FEE mode.
drs	The DCO range selection.
fllStableDelay	Delay function to make sure FLL is stable.

Returns: Error code

mcg_mode_error_t CLOCK_HAL_SetBlpiMode	(	MCG_Type *	base,
		uint8_t	fcrdivVal,
		mcg_irc_mode_t	ircSelect
	)

This function sets the MCG to BLPI mode.

Parameters

base	Base address for current MCG instance.
ircselect	The internal reference clock to select.

Returns: Error code

mcg_mode_error_t CLOCK_HAL_SetBlpeMode	(	MCG_Type *	base,
		mcg_oscsel_select_t	oscselVal
	)

This function sets the MCG to BLPE mode.

Parameters

base	Base address for current MCG instance.
oscselval	OSCSEL in FEE mode.

Returns: Error code

mcg_mode_error_t CLOCK_HAL_SetPbeMode	(	MCG_Type *	base,
		mcg_oscsel_select_t	oscselVal,
		mcg_pll_clk_select_t	pllcsSelect,
		uint8_t	prdivVal,
		uint8_t	vdivVal
	)

This function sets the MCG to PBE mode.

Parameters

base	Base address for current MCG instance.
oscselVal	OSCSEL in PBE mode.
pllcsSelect	PLLCS in PBE mode.
prdivVal	PRDIV in PBE mode.
vdivVal	VDIV in PBE mode.

Returns: Error code

mcg_mode_error_t CLOCK_HAL_SetPeeMode ( MCG_Type * base )

This function sets the MCG to PBE mode.

Parameters

base	Base address for current MCG instance.

Returns: Error code

Note: This function only change CLKS to use PLL/FLL output. If the PRDIV/VDIV are different from PBE mode, please setup these settings in PBE mode and wait for stable then switch to PEE mode.

Overview

OSC-related APIs

FLL reference clock source, divider, and output frequency.

PLL reference clock source, divider and output frequency

MCG mode related APIs

MCG auto trim machine(ATM) function

Files

Macros

Enumerations

Functions

MCG out clock access API

MCG control register access API

MCG FLL API

MCG internal reference clock APIs

MCG OSC APIs

MCG Auto Trim Machine (ATM)

Macro Definition Documentation

Enumeration Type Documentation

Function Documentation