VREF Peripheral driver

Overview

This section describes the programming interface of the VREF Peripheral driver. The VREF Peripheral driver configures the Voltage Reference (VREF). It handles initialization and configuration of Voltage Reference (VREF) module.

VREF Initialization

To initialize the VREF module, call the VREF_DRV_Init() function and pass in the user configuration structure. This function automatically enables the WDOG module and clock.

This example code shows how to initialize and configure the driver:

    vref_user_config_t vrefConfig =
    {
#if FSL_FEATURE_VREF_HAS_CHOP_OSC
        .chopOscEnable = true,
#endif
        .trimValue = 0,
        .regulatorEnable = true,
#if FSL_FEATURE_VREF_HAS_COMPENSATION
        .soccEnable = true,
#endif
        .bufferMode = kVrefModeHighPowerBuffer
    };

    // Initialize VREF
    VREF_DRV_Init(VREF_IDX, &vrefConfig);

VREF set output result

To set the resulting VREF by approximately ± 0.5 mV for each step, call VREF_DRV_SetTrimValue() function and pass the TRIM value.

// These bits change the resulting VREF
VREF_DRV_SetTrimValue(VREF_IDX, trimValue);

Files
file	fsl_vref_driver.h

Functions
vref_status_t	VREF_DRV_Init (uint32_t instance, const vref_user_config_t *userConfigPtr)
	Initializes the VREF module. More...
vref_status_t	VREF_DRV_Deinit (uint32_t instance)
	De-initializes the VREF module. More...
vref_status_t	VREF_DRV_SetTrimValue (uint32_t instance, uint8_t trimValue)
	Sets the TRIM bits value. More...
static uint8_t	VREF_DRV_GetTrimValue (uint32_t instance)
	Get TRIM bits value was set. More...
static vref_status_t	VREF_DRV_SetRegulator (uint32_t instance, bool enable)
	Enables or disables the regulator. More...
static vref_status_t	VREF_DRV_SetBufferMode (uint32_t instance, vref_buffer_mode_t bufferMode)
	Sets the buffer mode. More...

Function Documentation

vref_status_t VREF_DRV_Init	(	uint32_t	instance,
		const vref_user_config_t *	userConfigPtr
	)

Parameters

instance	VREF instance.
userConfigPtr	Pointer to the initialization structure. See the "vref_user_config_t".

Returns

Execution status.

vref_status_t VREF_DRV_Deinit

(

uint32_t

instance

)

Parameters

instance

VREF instance.

Returns

Execution status.

vref_status_t VREF_DRV_SetTrimValue	(	uint32_t	instance,
		uint8_t	trimValue
	)

These bits change the resulting VREF by approximately +/- 0.5 mV for each step. For minimum and maximum voltage reference output values, see the Data Sheet for this chip.

Parameters

instance	VREF instance.
trimValue	TRIM bits value.

Returns

Execution status.

static uint8_t VREF_DRV_GetTrimValue ( uint32_t  instance )

inlinestatic

Parameters

instance

VREF instance.

Returns

Actual TRIM bits value.

static vref_status_t VREF_DRV_SetRegulator ( uint32_t  instance, bool  enable  )

inlinestatic

This bit is used to enable the internal 1.75 V regulator to produce a constant internal voltage supply to reduce the sensitivity to the external supply noise and variation. To keep the regulator enabled in very low power modes, see the Chip Configuration details for a description. This bit is set during factory trimming of the VREF voltage and should be written to 1 to achieve the performance stated in the data sheet.

Parameters

instance	VREF instance.
enable	Enables or disables internal regulator true : Internal regulator enable false: Internal regulator disable

Returns

Execution status.

static vref_status_t VREF_DRV_SetBufferMode ( uint32_t  instance, vref_buffer_mode_t  bufferMode  )

inlinestatic

These bits select the buffer modes for the Voltage Reference module.

• Buffer mode = 0x00: The internal VREF bandgap is enabled to generate an accurate 1.2 V output that can be trimmed with the TRM register TRIM[5:0] bit field. The bandgap requires some time for startup and stabilization. SC[VREFST] can be monitored to determine if the stabilization and startup is complete.
• Buffer mode = 0x01: The internal VREF bandgap is on. The high power buffer is enabled to generate a buffered 1.2 V voltage to VREF_OUT.
• Buffer mode = 0x02: The internal VREF bandgap is on. The high power buffer is enabled to generate a buffered 1.2 V voltage to VREF_OUT.

VREF_OUT generated by high and low buffer modes can also be used as a reference to internal analog peripherals such as an ADC channel or analog comparator input. If those modes is entered from the standby mode, there is a delay before the buffer output is settled at the final value. A 100 nF capacitor is required to connect between the VREF_OUT pin and VSSA.

Parameters

instance	VREF instance.
bufferMode	Buffer mode value.

Returns

Execution status.