Overview

This section describes the programming interface of the DSPI Peripheral driver. The DSPI driver configures DSPI module, provides the functional and transactional interfaces to build the DSPI application.

Typical use case

Master Operation

dspi_master_handle_t g_m_handle; //global variable
dspi_master_config_t  masterConfig;
masterConfig.whichCtar                                = kDSPI_Ctar0;
masterConfig.ctarConfig.baudRate                      = baudrate;
masterConfig.ctarConfig.bitsPerFrame                  = 8;
masterConfig.ctarConfig.cpol                          = kDSPI_ClockPolarityActiveHigh;
masterConfig.ctarConfig.cpha                          = kDSPI_ClockPhaseFirstEdge;
masterConfig.ctarConfig.direction                     = kDSPI_MsbFirst;
masterConfig.ctarConfig.pcsToSckDelayInNanoSec        = 1000000000 / baudrate ;
masterConfig.ctarConfig.lastSckToPcsDelayInNanoSec    = 1000000000 / baudrate ;
masterConfig.ctarConfig.betweenTransferDelayInNanoSec = 1000000000 / baudrate ;
masterConfig.whichPcs                                 = kDSPI_Pcs0;
masterConfig.pcsActiveHighOrLow                       = kDSPI_PcsActiveLow;
masterConfig.enableContinuousSCK                      = false;
masterConfig.enableRxFifoOverWrite                    = false;
masterConfig.enableModifiedTimingFormat               = false;
masterConfig.samplePoint                              = kDSPI_SckToSin0Clock;
DSPI_MasterInit(base, &masterConfig, srcClock_Hz);
//srcClock_Hz = CLOCK_GetFreq(xxx);
DSPI_MasterInit(base, &masterConfig, srcClock_Hz);
DSPI_MasterTransferCreateHandle(base, &g_m_handle, NULL, NULL);
masterXfer.txData      = masterSendBuffer;
masterXfer.rxData      = masterReceiveBuffer;
masterXfer.dataSize    = transfer_dataSize;
masterXfer.configFlags = kDSPI_MasterCtar0 | kDSPI_MasterPcs0 ;
DSPI_MasterTransferBlocking(base, &g_m_handle, &masterXfer);

Slave Operation

dspi_slave_handle_t g_s_handle;//global variable
/*Slave config
slaveConfig.whichCtar                  = kDSPI_Ctar0;
slaveConfig.ctarConfig.bitsPerFrame    = 8;
slaveConfig.ctarConfig.cpol            = kDSPI_ClockPolarityActiveHigh;
slaveConfig.ctarConfig.cpha            = kDSPI_ClockPhaseFirstEdge;
slaveConfig.enableContinuousSCK        = false;
slaveConfig.enableRxFifoOverWrite      = false;
slaveConfig.enableModifiedTimingFormat = false;
slaveConfig.samplePoint                = kDSPI_SckToSin0Clock;
DSPI_SlaveInit(base, &slaveConfig);
slaveXfer.txData      = slaveSendBuffer0;
slaveXfer.rxData      = slaveReceiveBuffer0;
slaveXfer.dataSize    = transfer_dataSize;
slaveXfer.configFlags = kDSPI_SlaveCtar0;
bool isTransferCompleted = false;
DSPI_SlaveTransferCreateHandle(base, &g_s_handle, DSPI_SlaveUserCallback, &isTransferCompleted);
DSPI_SlaveTransferNonBlocking(&g_s_handle, &slaveXfer);
//void DSPI_SlaveUserCallback(SPI_Type *base, dspi_slave_handle_t *handle, status_t status, void *isTransferCompleted)
//{
//    if (status == kStatus_Success)
//    {
//        __NOP();
//    }
//    else if (status == kStatus_DSPI_Error)
//    {
//        __NOP();
//    }
//
//    *((bool *)isTransferCompleted) = true;
//
//    PRINTF("This is DSPI slave call back . \r\n");
//}

Files
file	fsl_dspi.h

Data Structures
struct	dspi_command_data_config_t
	DSPI master command date configuration used for SPIx_PUSHR. More...

struct	dspi_master_ctar_config_t
	DSPI master ctar configuration structure. More...

struct	dspi_master_config_t
	DSPI master configuration structure. More...

struct	dspi_slave_ctar_config_t
	DSPI slave ctar configuration structure. More...

struct	dspi_slave_config_t
	DSPI slave configuration structure. More...

struct	dspi_transfer_t
	DSPI master/slave transfer structure. More...

struct	dspi_master_handle_t
	DSPI master transfer handle structure used for transactional API. More...

struct	dspi_slave_handle_t
	DSPI slave transfer handle structure used for transactional API. More...

Macros
#define	DSPI_MASTER_CTAR_SHIFT (0U)
	DSPI master CTAR shift macro , internal used. More...

#define	DSPI_MASTER_CTAR_MASK (0x0FU)
	DSPI master CTAR mask macro , internal used. More...

#define	DSPI_MASTER_PCS_SHIFT (4U)
	DSPI master PCS shift macro , internal used. More...

#define	DSPI_MASTER_PCS_MASK (0xF0U)
	DSPI master PCS mask macro , internal used. More...

#define	DSPI_SLAVE_CTAR_SHIFT (0U)
	DSPI slave CTAR shift macro , internal used. More...

#define	DSPI_SLAVE_CTAR_MASK (0x07U)
	DSPI slave CTAR mask macro , internal used. More...

Typedefs
typedef void(*	dspi_master_transfer_callback_t )(SPI_Type base, dspi_master_handle_t handle, status_t status, void *userData)
	Completion callback function pointer type. More...

typedef void(*	dspi_slave_transfer_callback_t )(SPI_Type base, dspi_slave_handle_t handle, status_t status, void *userData)
	Completion callback function pointer type. More...

Enumerations
enum	_dspi_status { kStatus_DSPI_Busy = MAKE_STATUS(kStatusGroup_DSPI, 0), kStatus_DSPI_Error = MAKE_STATUS(kStatusGroup_DSPI, 1), kStatus_DSPI_Idle = MAKE_STATUS(kStatusGroup_DSPI, 2), kStatus_DSPI_OutOfRange = MAKE_STATUS(kStatusGroup_DSPI, 3) }
	Status for the DSPI driver. More...

enum	_dspi_flags { kDSPI_TxCompleteFlag = SPI_SR_TCF_MASK, kDSPI_EndOfQueueFlag = SPI_SR_EOQF_MASK, kDSPI_TxFifoUnderflowFlag = SPI_SR_TFUF_MASK, kDSPI_TxFifoFillRequestFlag = SPI_SR_TFFF_MASK, kDSPI_RxFifoOverflowFlag = SPI_SR_RFOF_MASK, kDSPI_RxFifoDrainRequestFlag = SPI_SR_RFDF_MASK, kDSPI_TxAndRxStatusFlag = SPI_SR_TXRXS_MASK, kDSPI_AllStatusFlag }
	DSPI status flags in SPIx_SR register. More...

enum	_dspi_interrupt_enable { kDSPI_TxCompleteInterruptEnable = SPI_RSER_TCF_RE_MASK, kDSPI_EndOfQueueInterruptEnable = SPI_RSER_EOQF_RE_MASK, kDSPI_TxFifoUnderflowInterruptEnable = SPI_RSER_TFUF_RE_MASK, kDSPI_TxFifoFillRequestInterruptEnable = SPI_RSER_TFFF_RE_MASK, kDSPI_RxFifoOverflowInterruptEnable = SPI_RSER_RFOF_RE_MASK, kDSPI_RxFifoDrainRequestInterruptEnable = SPI_RSER_RFDF_RE_MASK, kDSPI_AllInterruptEnable }
	DSPI interrupt source. More...

enum	_dspi_dma_enable { kDSPI_TxDmaEnable = (SPI_RSER_TFFF_RE_MASK \| SPI_RSER_TFFF_DIRS_MASK), kDSPI_RxDmaEnable = (SPI_RSER_RFDF_RE_MASK \| SPI_RSER_RFDF_DIRS_MASK) }
	DSPI DMA source. More...

enum	dspi_master_slave_mode_t { kDSPI_Master = 1U, kDSPI_Slave = 0U }
	DSPI master or slave mode configuration. More...

enum	dspi_master_sample_point_t { kDSPI_SckToSin0Clock = 0U, kDSPI_SckToSin1Clock = 1U, kDSPI_SckToSin2Clock = 2U }
	DSPI Sample Point: Controls when the DSPI master samples SIN in Modified Transfer Format. More...

enum	dspi_which_pcs_t { kDSPI_Pcs0 = 1U << 0, kDSPI_Pcs1 = 1U << 1, kDSPI_Pcs2 = 1U << 2, kDSPI_Pcs3 = 1U << 3, kDSPI_Pcs4 = 1U << 4, kDSPI_Pcs5 = 1U << 5 }
	DSPI Peripheral Chip Select (Pcs) configuration (which Pcs to configure). More...

enum	dspi_pcs_polarity_config_t { kDSPI_PcsActiveHigh = 0U, kDSPI_PcsActiveLow = 1U }
	DSPI Peripheral Chip Select (Pcs) Polarity configuration. More...

enum	_dspi_pcs_polarity { kDSPI_Pcs0ActiveLow = 1U << 0, kDSPI_Pcs1ActiveLow = 1U << 1, kDSPI_Pcs2ActiveLow = 1U << 2, kDSPI_Pcs3ActiveLow = 1U << 3, kDSPI_Pcs4ActiveLow = 1U << 4, kDSPI_Pcs5ActiveLow = 1U << 5, kDSPI_PcsAllActiveLow = 0xFFU }
	DSPI Peripheral Chip Select (Pcs) Polarity. More...

enum	dspi_clock_polarity_t { kDSPI_ClockPolarityActiveHigh = 0U, kDSPI_ClockPolarityActiveLow = 1U }
	DSPI clock polarity configuration for a given CTAR. More...

enum	dspi_clock_phase_t { kDSPI_ClockPhaseFirstEdge = 0U, kDSPI_ClockPhaseSecondEdge = 1U }
	DSPI clock phase configuration for a given CTAR. More...

enum	dspi_shift_direction_t { kDSPI_MsbFirst = 0U, kDSPI_LsbFirst = 1U }
	DSPI data shifter direction options for a given CTAR. More...

enum	dspi_delay_type_t { kDSPI_PcsToSck = 1U, kDSPI_LastSckToPcs, kDSPI_BetweenTransfer }
	DSPI delay type selection. More...

enum	dspi_ctar_selection_t { kDSPI_Ctar0 = 0U, kDSPI_Ctar1 = 1U, kDSPI_Ctar2 = 2U, kDSPI_Ctar3 = 3U, kDSPI_Ctar4 = 4U, kDSPI_Ctar5 = 5U, kDSPI_Ctar6 = 6U, kDSPI_Ctar7 = 7U }
	DSPI Clock and Transfer Attributes Register (CTAR) selection. More...

enum	_dspi_transfer_config_flag_for_master { kDSPI_MasterCtar0 = 0U << DSPI_MASTER_CTAR_SHIFT, kDSPI_MasterCtar1 = 1U << DSPI_MASTER_CTAR_SHIFT, kDSPI_MasterCtar2 = 2U << DSPI_MASTER_CTAR_SHIFT, kDSPI_MasterCtar3 = 3U << DSPI_MASTER_CTAR_SHIFT, kDSPI_MasterCtar4 = 4U << DSPI_MASTER_CTAR_SHIFT, kDSPI_MasterCtar5 = 5U << DSPI_MASTER_CTAR_SHIFT, kDSPI_MasterCtar6 = 6U << DSPI_MASTER_CTAR_SHIFT, kDSPI_MasterCtar7 = 7U << DSPI_MASTER_CTAR_SHIFT, kDSPI_MasterPcs0 = 0U << DSPI_MASTER_PCS_SHIFT, kDSPI_MasterPcs1 = 1U << DSPI_MASTER_PCS_SHIFT, kDSPI_MasterPcs2 = 2U << DSPI_MASTER_PCS_SHIFT, kDSPI_MasterPcs3 = 3U << DSPI_MASTER_PCS_SHIFT, kDSPI_MasterPcs4 = 4U << DSPI_MASTER_PCS_SHIFT, kDSPI_MasterPcs5 = 5U << DSPI_MASTER_PCS_SHIFT, kDSPI_MasterPcsContinuous = 1U << 20, kDSPI_MasterActiveAfterTransfer = 1U << 21 }
	Can use this enumeration for DSPI master transfer configFlags. More...

enum	_dspi_transfer_config_flag_for_slave { kDSPI_SlaveCtar0 = 0U << DSPI_SLAVE_CTAR_SHIFT }
	Can use this enum for DSPI slave transfer configFlags. More...

enum	_dspi_transfer_state { kDSPI_Idle = 0x0U, kDSPI_Busy, kDSPI_Error }
	DSPI transfer state, which is used for DSPI transactional APIs' state machine. More...

Driver version
#define	FSL_DSPI_DRIVER_VERSION (MAKE_VERSION(2, 1, 0))
	DSPI driver version 2.1.0. More...

Dummy data
#define	DSPI_MASTER_DUMMY_DATA (0x00U)
	Master dummy data used for tx if there is not txData. More...

#define	DSPI_SLAVE_DUMMY_DATA (0x00U)
	Slave dummy data used for tx if there is not txData. More...

Initialization and deinitialization
void	DSPI_MasterInit (SPI_Type base, const dspi_master_config_t masterConfig, uint32_t srcClock_Hz)
	Initializes the DSPI master. More...

void	DSPI_MasterGetDefaultConfig (dspi_master_config_t *masterConfig)
	Sets the dspi_master_config_t structure to default values. More...

void	DSPI_SlaveInit (SPI_Type base, const dspi_slave_config_t slaveConfig)
	DSPI slave configuration. More...

void	DSPI_SlaveGetDefaultConfig (dspi_slave_config_t *slaveConfig)
	Sets the dspi_slave_config_t structure to default values. More...

void	DSPI_Deinit (SPI_Type *base)
	De-initializes the DSPI peripheral. More...

static void	DSPI_Enable (SPI_Type *base, bool enable)
	Enables the DSPI peripheral and sets the MCR MDIS to 0. More...

Status
static uint32_t	DSPI_GetStatusFlags (SPI_Type *base)
	Gets the DSPI status flag state. More...

static void	DSPI_ClearStatusFlags (SPI_Type *base, uint32_t statusFlags)
	Clears the DSPI status flag. More...

Interrupts
void	DSPI_EnableInterrupts (SPI_Type *base, uint32_t mask)
	Enables the DSPI interrupts. More...

static void	DSPI_DisableInterrupts (SPI_Type *base, uint32_t mask)
	Disables the DSPI interrupts. More...

DMA Control
static void	DSPI_EnableDMA (SPI_Type *base, uint32_t mask)
	Enables the DSPI DMA request. More...

static void	DSPI_DisableDMA (SPI_Type *base, uint32_t mask)
	Disables the DSPI DMA request. More...

static uint32_t	DSPI_MasterGetTxRegisterAddress (SPI_Type *base)
	Gets the DSPI master PUSHR data register address for the DMA operation. More...

static uint32_t	DSPI_SlaveGetTxRegisterAddress (SPI_Type *base)
	Gets the DSPI slave PUSHR data register address for the DMA operation. More...

static uint32_t	DSPI_GetRxRegisterAddress (SPI_Type *base)
	Gets the DSPI POPR data register address for the DMA operation. More...

Bus Operations
static void	DSPI_SetMasterSlaveMode (SPI_Type *base, dspi_master_slave_mode_t mode)
	Configures the DSPI for master or slave. More...

static bool	DSPI_IsMaster (SPI_Type *base)
	Returns whether the DSPI module is in master mode. More...

static void	DSPI_StartTransfer (SPI_Type *base)
	Starts the DSPI transfers and clears HALT bit in MCR. More...

static void	DSPI_StopTransfer (SPI_Type *base)
	Stops (halts) DSPI transfers and sets HALT bit in MCR. More...

static void	DSPI_SetFifoEnable (SPI_Type *base, bool enableTxFifo, bool enableRxFifo)
	Enables (or disables) the DSPI FIFOs. More...

static void	DSPI_FlushFifo (SPI_Type *base, bool flushTxFifo, bool flushRxFifo)
	Flushes the DSPI FIFOs. More...

static void	DSPI_SetAllPcsPolarity (SPI_Type *base, uint32_t mask)
	Configures the DSPI peripheral chip select polarity simultaneously. More...

uint32_t	DSPI_MasterSetBaudRate (SPI_Type *base, dspi_ctar_selection_t whichCtar, uint32_t baudRate_Bps, uint32_t srcClock_Hz)
	Sets the DSPI baud rate in bits per second. More...

void	DSPI_MasterSetDelayScaler (SPI_Type *base, dspi_ctar_selection_t whichCtar, uint32_t prescaler, uint32_t scaler, dspi_delay_type_t whichDelay)
	Manually configures the delay prescaler and scaler for a particular CTAR. More...

uint32_t	DSPI_MasterSetDelayTimes (SPI_Type *base, dspi_ctar_selection_t whichCtar, dspi_delay_type_t whichDelay, uint32_t srcClock_Hz, uint32_t delayTimeInNanoSec)
	Calculates the delay prescaler and scaler based on the desired delay input in nanoseconds. More...

static void	DSPI_MasterWriteData (SPI_Type base, dspi_command_data_config_t command, uint16_t data)
	Writes data into the data buffer for master mode. More...

void	DSPI_GetDefaultDataCommandConfig (dspi_command_data_config_t *command)
	Sets the dspi_command_data_config_t structure to default values. More...

void	DSPI_MasterWriteDataBlocking (SPI_Type base, dspi_command_data_config_t command, uint16_t data)
	Writes data into the data buffer master mode and waits till complete to return. More...

static uint32_t	DSPI_MasterGetFormattedCommand (dspi_command_data_config_t *command)
	Returns the DSPI command word formatted to the PUSHR data register bit field. More...

void	DSPI_MasterWriteCommandDataBlocking (SPI_Type *base, uint32_t data)
	Writes a 32-bit data word (16-bit command appended with 16-bit data) into the data buffer, master mode and waits till complete to return. More...

static void	DSPI_SlaveWriteData (SPI_Type *base, uint32_t data)
	Writes data into the data buffer in slave mode. More...

void	DSPI_SlaveWriteDataBlocking (SPI_Type *base, uint32_t data)
	Writes data into the data buffer in slave mode, waits till data was transmitted, and returns. More...

static uint32_t	DSPI_ReadData (SPI_Type *base)
	Reads data from the data buffer. More...

Transactional
void	DSPI_MasterTransferCreateHandle (SPI_Type base, dspi_master_handle_t handle, dspi_master_transfer_callback_t callback, void *userData)
	Initializes the DSPI master handle. More...

status_t	DSPI_MasterTransferBlocking (SPI_Type base, dspi_transfer_t transfer)
	DSPI master transfer data using polling. More...

status_t	DSPI_MasterTransferNonBlocking (SPI_Type base, dspi_master_handle_t handle, dspi_transfer_t *transfer)
	DSPI master transfer data using interrupts. More...

status_t	DSPI_MasterTransferGetCount (SPI_Type base, dspi_master_handle_t handle, size_t *count)
	Gets the master transfer count. More...

void	DSPI_MasterTransferAbort (SPI_Type base, dspi_master_handle_t handle)
	DSPI master aborts transfer using an interrupt. More...

void	DSPI_MasterTransferHandleIRQ (SPI_Type base, dspi_master_handle_t handle)
	DSPI Master IRQ handler function. More...

void	DSPI_SlaveTransferCreateHandle (SPI_Type base, dspi_slave_handle_t handle, dspi_slave_transfer_callback_t callback, void *userData)
	Initializes the DSPI slave handle. More...

status_t	DSPI_SlaveTransferNonBlocking (SPI_Type base, dspi_slave_handle_t handle, dspi_transfer_t *transfer)
	DSPI slave transfers data using an interrupt. More...

status_t	DSPI_SlaveTransferGetCount (SPI_Type base, dspi_slave_handle_t handle, size_t *count)
	Gets the slave transfer count. More...

void	DSPI_SlaveTransferAbort (SPI_Type base, dspi_slave_handle_t handle)
	DSPI slave aborts a transfer using an interrupt. More...

void	DSPI_SlaveTransferHandleIRQ (SPI_Type base, dspi_slave_handle_t handle)
	DSPI Master IRQ handler function. More...

Data Structure Documentation

struct dspi_command_data_config_t

Data Fields
bool	isPcsContinuous
	Option to enable the continuous assertion of chip select between transfers. More...

dspi_ctar_selection_t	whichCtar
	The desired Clock and Transfer Attributes Register (CTAR) to use for CTAS. More...

dspi_which_pcs_t	whichPcs
	The desired PCS signal to use for the data transfer. More...

bool	isEndOfQueue
	Signals that the current transfer is the last in the queue. More...

bool	clearTransferCount
	Clears SPI Transfer Counter (SPI_TCNT) before transmission starts. More...

Field Documentation

bool dspi_command_data_config_t::isPcsContinuous

dspi_ctar_selection_t dspi_command_data_config_t::whichCtar

dspi_which_pcs_t dspi_command_data_config_t::whichPcs

bool dspi_command_data_config_t::isEndOfQueue

bool dspi_command_data_config_t::clearTransferCount

struct dspi_master_ctar_config_t

Data Fields
uint32_t	baudRate
	Baud Rate for DSPI. More...

uint32_t	bitsPerFrame
	Bits per frame, minimum 4, maximum 16. More...

dspi_clock_polarity_t	cpol
	Clock polarity. More...

dspi_clock_phase_t	cpha
	Clock phase. More...

dspi_shift_direction_t	direction
	MSB or LSB data shift direction. More...

uint32_t	pcsToSckDelayInNanoSec
	PCS to SCK delay time with nanosecond , set to 0 sets the minimum delay. More...

uint32_t	lastSckToPcsDelayInNanoSec
	Last SCK to PCS delay time with nanosecond , set to 0 sets the minimum delay.It sets the boundary value if out of range that can be set. More...

uint32_t	betweenTransferDelayInNanoSec
	After SCK delay time with nanosecond , set to 0 sets the minimum delay.It sets the boundary value if out of range that can be set. More...

Field Documentation

uint32_t dspi_master_ctar_config_t::baudRate

uint32_t dspi_master_ctar_config_t::bitsPerFrame

dspi_clock_polarity_t dspi_master_ctar_config_t::cpol

dspi_clock_phase_t dspi_master_ctar_config_t::cpha

dspi_shift_direction_t dspi_master_ctar_config_t::direction

uint32_t dspi_master_ctar_config_t::pcsToSckDelayInNanoSec

It sets the boundary value if out of range that can be set.

uint32_t dspi_master_ctar_config_t::lastSckToPcsDelayInNanoSec

uint32_t dspi_master_ctar_config_t::betweenTransferDelayInNanoSec

struct dspi_master_config_t

Data Fields
dspi_ctar_selection_t	whichCtar
	Desired CTAR to use. More...

dspi_master_ctar_config_t	ctarConfig
	Set the ctarConfig to the desired CTAR. More...

dspi_which_pcs_t	whichPcs
	Desired Peripheral Chip Select (pcs). More...

dspi_pcs_polarity_config_t	pcsActiveHighOrLow
	Desired PCS active high or low. More...

bool	enableContinuousSCK
	CONT_SCKE, continuous SCK enable . More...

bool	enableRxFifoOverWrite
	ROOE, Receive FIFO overflow overwrite enable. More...

bool	enableModifiedTimingFormat
	Enables a modified transfer format to be used if it's true. More...

dspi_master_sample_point_t	samplePoint
	Controls when the module master samples SIN in Modified Transfer Format. More...

Field Documentation

dspi_ctar_selection_t dspi_master_config_t::whichCtar

dspi_master_ctar_config_t dspi_master_config_t::ctarConfig

dspi_which_pcs_t dspi_master_config_t::whichPcs

dspi_pcs_polarity_config_t dspi_master_config_t::pcsActiveHighOrLow

bool dspi_master_config_t::enableContinuousSCK

Note that continuous SCK is only supported for CPHA = 1.

bool dspi_master_config_t::enableRxFifoOverWrite

ROOE = 0, the incoming data is ignored, the data from the transfer that generated the overflow is either ignored. ROOE = 1, the incoming data is shifted in to the shift to the shift register.

bool dspi_master_config_t::enableModifiedTimingFormat

dspi_master_sample_point_t dspi_master_config_t::samplePoint

It's valid only when CPHA=0.

struct dspi_slave_ctar_config_t

Data Fields
uint32_t	bitsPerFrame
	Bits per frame, minimum 4, maximum 16. More...

dspi_clock_polarity_t	cpol
	Clock polarity. More...

dspi_clock_phase_t	cpha
	Clock phase. More...

Field Documentation

uint32_t dspi_slave_ctar_config_t::bitsPerFrame

dspi_clock_polarity_t dspi_slave_ctar_config_t::cpol

dspi_clock_phase_t dspi_slave_ctar_config_t::cpha

Slave only supports MSB , does not support LSB.

struct dspi_slave_config_t

Data Fields
dspi_ctar_selection_t	whichCtar
	Desired CTAR to use. More...

dspi_slave_ctar_config_t	ctarConfig
	Set the ctarConfig to the desired CTAR. More...

bool	enableContinuousSCK
	CONT_SCKE, continuous SCK enable. More...

bool	enableRxFifoOverWrite
	ROOE, Receive FIFO overflow overwrite enable. More...

bool	enableModifiedTimingFormat
	Enables a modified transfer format to be used if it's true. More...

dspi_master_sample_point_t	samplePoint
	Controls when the module master samples SIN in Modified Transfer Format. More...

Field Documentation

dspi_ctar_selection_t dspi_slave_config_t::whichCtar

dspi_slave_ctar_config_t dspi_slave_config_t::ctarConfig

bool dspi_slave_config_t::enableContinuousSCK

Note that continuous SCK is only supported for CPHA = 1.

bool dspi_slave_config_t::enableRxFifoOverWrite

ROOE = 0, the incoming data is ignored, the data from the transfer that generated the overflow is either ignored. ROOE = 1, the incoming data is shifted in to the shift to the shift register.

bool dspi_slave_config_t::enableModifiedTimingFormat

dspi_master_sample_point_t dspi_slave_config_t::samplePoint

It's valid only when CPHA=0.

struct dspi_transfer_t

Data Fields
uint8_t *	txData
	Send buffer. More...

uint8_t *	rxData
	Receive buffer. More...

volatile size_t	dataSize
	Transfer bytes. More...

uint32_t	configFlags
	Transfer transfer configuration flags , set from _dspi_transfer_config_flag_for_master if the transfer is used for master or _dspi_transfer_config_flag_for_slave enumeration if the transfer is used for slave. More...

Field Documentation

uint8_t* dspi_transfer_t::txData

uint8_t* dspi_transfer_t::rxData

volatile size_t dspi_transfer_t::dataSize

uint32_t dspi_transfer_t::configFlags

struct _dspi_master_handle

Forward declaration of the _dspi_master_handle typedefs.

Data Fields
uint32_t	bitsPerFrame
	Desired number of bits per frame. More...

volatile uint32_t	command
	Desired data command. More...

volatile uint32_t	lastCommand
	Desired last data command. More...

uint8_t	fifoSize
	FIFO dataSize. More...

volatile bool	isPcsActiveAfterTransfer
	Is PCS signal keep active after the last frame transfer. More...

volatile bool	isThereExtraByte
	Is there extra byte. More...

uint8_t *volatile	txData
	Send buffer. More...

uint8_t *volatile	rxData
	Receive buffer. More...

volatile size_t	remainingSendByteCount
	Number of bytes remaining to send. More...

volatile size_t	remainingReceiveByteCount
	Number of bytes remaining to receive. More...

size_t	totalByteCount
	Number of transfer bytes.

volatile uint8_t	state
	DSPI transfer state , _dspi_transfer_state. More...

dspi_master_transfer_callback_t	callback
	Completion callback. More...

void *	userData
	Callback user data. More...

Field Documentation

uint32_t dspi_master_handle_t::bitsPerFrame

volatile uint32_t dspi_master_handle_t::command

volatile uint32_t dspi_master_handle_t::lastCommand

uint8_t dspi_master_handle_t::fifoSize

volatile bool dspi_master_handle_t::isPcsActiveAfterTransfer

volatile bool dspi_master_handle_t::isThereExtraByte

uint8_t* volatile dspi_master_handle_t::txData

uint8_t* volatile dspi_master_handle_t::rxData

volatile size_t dspi_master_handle_t::remainingSendByteCount

volatile size_t dspi_master_handle_t::remainingReceiveByteCount

volatile uint8_t dspi_master_handle_t::state

dspi_master_transfer_callback_t dspi_master_handle_t::callback

void* dspi_master_handle_t::userData

struct _dspi_slave_handle

Forward declaration of the _dspi_slave_handle typedefs.

Data Fields
uint32_t	bitsPerFrame
	Desired number of bits per frame. More...

volatile bool	isThereExtraByte
	Is there extra byte. More...

uint8_t *volatile	txData
	Send buffer. More...

uint8_t *volatile	rxData
	Receive buffer. More...

volatile size_t	remainingSendByteCount
	Number of bytes remaining to send. More...

volatile size_t	remainingReceiveByteCount
	Number of bytes remaining to receive. More...

size_t	totalByteCount
	Number of transfer bytes.

volatile uint8_t	state
	DSPI transfer state. More...

volatile uint32_t	errorCount
	Error count for slave transfer. More...

dspi_slave_transfer_callback_t	callback
	Completion callback. More...

void *	userData
	Callback user data. More...

Field Documentation

uint32_t dspi_slave_handle_t::bitsPerFrame

volatile bool dspi_slave_handle_t::isThereExtraByte

uint8_t* volatile dspi_slave_handle_t::txData

uint8_t* volatile dspi_slave_handle_t::rxData

volatile size_t dspi_slave_handle_t::remainingSendByteCount

volatile size_t dspi_slave_handle_t::remainingReceiveByteCount

volatile uint8_t dspi_slave_handle_t::state

volatile uint32_t dspi_slave_handle_t::errorCount

dspi_slave_transfer_callback_t dspi_slave_handle_t::callback

void* dspi_slave_handle_t::userData

Macro Definition Documentation

#define FSL_DSPI_DRIVER_VERSION (MAKE_VERSION(2, 1, 0))

#define DSPI_MASTER_DUMMY_DATA (0x00U)

#define DSPI_SLAVE_DUMMY_DATA (0x00U)

#define DSPI_MASTER_CTAR_SHIFT (0U)

#define DSPI_MASTER_CTAR_MASK (0x0FU)

#define DSPI_MASTER_PCS_SHIFT (4U)

#define DSPI_MASTER_PCS_MASK (0xF0U)

#define DSPI_SLAVE_CTAR_SHIFT (0U)

#define DSPI_SLAVE_CTAR_MASK (0x07U)

Typedef Documentation

typedef void(* dspi_master_transfer_callback_t)(SPI_Type *base, dspi_master_handle_t *handle, status_t status, void *userData)

Parameters

base	DSPI peripheral address.
handle	Pointer to the handle for the DSPI master.
status	Success or error code describing whether the transfer completed.
userData	Arbitrary pointer-dataSized value passed from the application.

typedef void(* dspi_slave_transfer_callback_t)(SPI_Type *base, dspi_slave_handle_t *handle, status_t status, void *userData)

Parameters

base	DSPI peripheral address.
handle	Pointer to the handle for the DSPI slave.
status	Success or error code describing whether the transfer completed.
userData	Arbitrary pointer-dataSized value passed from the application.

Enumeration Type Documentation

enum _dspi_status

Enumerator
kStatus_DSPI_Busy	DSPI transfer is busy.
kStatus_DSPI_Error	DSPI driver error.
kStatus_DSPI_Idle	DSPI is idle.
kStatus_DSPI_OutOfRange	DSPI transfer out Of range.

enum _dspi_flags

Enumerator
kDSPI_TxCompleteFlag	Transfer Complete Flag.
kDSPI_EndOfQueueFlag	End of Queue Flag.
kDSPI_TxFifoUnderflowFlag	Transmit FIFO Underflow Flag.
kDSPI_TxFifoFillRequestFlag	Transmit FIFO Fill Flag.
kDSPI_RxFifoOverflowFlag	Receive FIFO Overflow Flag.
kDSPI_RxFifoDrainRequestFlag	Receive FIFO Drain Flag.
kDSPI_TxAndRxStatusFlag	The module is in Stopped/Running state.
kDSPI_AllStatusFlag	All status above.

enum _dspi_interrupt_enable

Enumerator
kDSPI_TxCompleteInterruptEnable	TCF interrupt enable.
kDSPI_EndOfQueueInterruptEnable	EOQF interrupt enable.
kDSPI_TxFifoUnderflowInterruptEnable	TFUF interrupt enable.
kDSPI_TxFifoFillRequestInterruptEnable	TFFF interrupt enable, DMA disable.
kDSPI_RxFifoOverflowInterruptEnable	RFOF interrupt enable.
kDSPI_RxFifoDrainRequestInterruptEnable	RFDF interrupt enable, DMA disable.
kDSPI_AllInterruptEnable	All above interrupts enable.

enum _dspi_dma_enable

Enumerator

kDSPI_TxDmaEnable

TFFF flag generates DMA requests.

No Tx interrupt request.

kDSPI_RxDmaEnable

RFDF flag generates DMA requests.

No Rx interrupt request.

enum dspi_master_slave_mode_t

Enumerator
kDSPI_Master	DSPI peripheral operates in master mode.
kDSPI_Slave	DSPI peripheral operates in slave mode.

enum dspi_master_sample_point_t

This field is valid only when CPHA bit in CTAR register is 0.

Enumerator
kDSPI_SckToSin0Clock	0 system clocks between SCK edge and SIN sample.
kDSPI_SckToSin1Clock	1 system clock between SCK edge and SIN sample.
kDSPI_SckToSin2Clock	2 system clocks between SCK edge and SIN sample.

enum dspi_which_pcs_t

Enumerator
kDSPI_Pcs0	Pcs[0].
kDSPI_Pcs1	Pcs[1].
kDSPI_Pcs2	Pcs[2].
kDSPI_Pcs3	Pcs[3].
kDSPI_Pcs4	Pcs[4].
kDSPI_Pcs5	Pcs[5].

enum dspi_pcs_polarity_config_t

Enumerator
kDSPI_PcsActiveHigh	Pcs Active High (idles low).
kDSPI_PcsActiveLow	Pcs Active Low (idles high).

enum _dspi_pcs_polarity

Enumerator
kDSPI_Pcs0ActiveLow	Pcs0 Active Low (idles high).
kDSPI_Pcs1ActiveLow	Pcs1 Active Low (idles high).
kDSPI_Pcs2ActiveLow	Pcs2 Active Low (idles high).
kDSPI_Pcs3ActiveLow	Pcs3 Active Low (idles high).
kDSPI_Pcs4ActiveLow	Pcs4 Active Low (idles high).
kDSPI_Pcs5ActiveLow	Pcs5 Active Low (idles high).
kDSPI_PcsAllActiveLow	Pcs0 to Pcs5 Active Low (idles high).

enum dspi_clock_polarity_t

Enumerator

kDSPI_ClockPolarityActiveHigh

CPOL=0.

Active-high DSPI clock (idles low).

kDSPI_ClockPolarityActiveLow

CPOL=1.

Active-low DSPI clock (idles high).

enum dspi_clock_phase_t

Enumerator

kDSPI_ClockPhaseFirstEdge

CPHA=0.

Data is captured on the leading edge of the SCK and changed on the following edge.

kDSPI_ClockPhaseSecondEdge

CPHA=1.

Data is changed on the leading edge of the SCK and captured on the following edge.

enum dspi_shift_direction_t

Enumerator
kDSPI_MsbFirst	Data transfers start with most significant bit.
kDSPI_LsbFirst	Data transfers start with least significant bit.

enum dspi_delay_type_t

Enumerator
kDSPI_PcsToSck	Pcs-to-SCK delay.
kDSPI_LastSckToPcs	Last SCK edge to Pcs delay.
kDSPI_BetweenTransfer	Delay between transfers.

enum dspi_ctar_selection_t

Enumerator
kDSPI_Ctar0	CTAR0 selection option for master or slave mode, note that CTAR0 and CTAR0_SLAVE are the same register address.
kDSPI_Ctar1	CTAR1 selection option for master mode only.
kDSPI_Ctar2	CTAR2 selection option for master mode only , note that some device do not support CTAR2.
kDSPI_Ctar3	CTAR3 selection option for master mode only , note that some device do not support CTAR3.
kDSPI_Ctar4	CTAR4 selection option for master mode only , note that some device do not support CTAR4.
kDSPI_Ctar5	CTAR5 selection option for master mode only , note that some device do not support CTAR5.
kDSPI_Ctar6	CTAR6 selection option for master mode only , note that some device do not support CTAR6.
kDSPI_Ctar7	CTAR7 selection option for master mode only , note that some device do not support CTAR7.

enum _dspi_transfer_config_flag_for_master

Enumerator
kDSPI_MasterCtar0	DSPI master transfer use CTAR0 setting.
kDSPI_MasterCtar1	DSPI master transfer use CTAR1 setting.
kDSPI_MasterCtar2	DSPI master transfer use CTAR2 setting.
kDSPI_MasterCtar3	DSPI master transfer use CTAR3 setting.
kDSPI_MasterCtar4	DSPI master transfer use CTAR4 setting.
kDSPI_MasterCtar5	DSPI master transfer use CTAR5 setting.
kDSPI_MasterCtar6	DSPI master transfer use CTAR6 setting.
kDSPI_MasterCtar7	DSPI master transfer use CTAR7 setting.
kDSPI_MasterPcs0	DSPI master transfer use PCS0 signal.
kDSPI_MasterPcs1	DSPI master transfer use PCS1 signal.
kDSPI_MasterPcs2	DSPI master transfer use PCS2 signal.
kDSPI_MasterPcs3	DSPI master transfer use PCS3 signal.
kDSPI_MasterPcs4	DSPI master transfer use PCS4 signal.
kDSPI_MasterPcs5	DSPI master transfer use PCS5 signal.
kDSPI_MasterPcsContinuous	Is PCS signal continuous.
kDSPI_MasterActiveAfterTransfer	Is PCS signal active after last frame transfer.

enum _dspi_transfer_config_flag_for_slave

Enumerator

kDSPI_SlaveCtar0

DSPI slave transfer use CTAR0 setting.

DSPI slave can only use PCS0.

enum _dspi_transfer_state

Enumerator
kDSPI_Idle	Nothing in the transmitter/receiver.
kDSPI_Busy	Transfer queue is not finished.
kDSPI_Error	Transfer error.

Function Documentation

void DSPI_MasterInit	(	SPI_Type *	base,
		const dspi_master_config_t *	masterConfig,
		uint32_t	srcClock_Hz
	)

This function initializes the DSPI master configuration. An example use case is as follows:

dspi_master_config_t  masterConfig;
masterConfig.whichCtar                                = kDSPI_Ctar0;
masterConfig.ctarConfig.baudRate                      = 500000000;
masterConfig.ctarConfig.bitsPerFrame                  = 8;
masterConfig.ctarConfig.cpol                          = kDSPI_ClockPolarityActiveHigh;
masterConfig.ctarConfig.cpha                          = kDSPI_ClockPhaseFirstEdge;
masterConfig.ctarConfig.direction                     = kDSPI_MsbFirst;
masterConfig.ctarConfig.pcsToSckDelayInNanoSec        = 1000000000 / masterConfig.ctarConfig.baudRate ;
masterConfig.ctarConfig.lastSckToPcsDelayInNanoSec    = 1000000000 / masterConfig.ctarConfig.baudRate ;
masterConfig.ctarConfig.betweenTransferDelayInNanoSec = 1000000000 / masterConfig.ctarConfig.baudRate ;
masterConfig.whichPcs                                 = kDSPI_Pcs0;
masterConfig.pcsActiveHighOrLow                       = kDSPI_PcsActiveLow;
masterConfig.enableContinuousSCK                      = false;
masterConfig.enableRxFifoOverWrite                    = false;
masterConfig.enableModifiedTimingFormat               = false;
masterConfig.samplePoint                              = kDSPI_SckToSin0Clock;
DSPI_MasterInit(base, &masterConfig, srcClock_Hz);

Parameters

base	DSPI peripheral address.
masterConfig	Pointer to structure dspi_master_config_t.
srcClock_Hz	Module source input clock in Hertz

void DSPI_MasterGetDefaultConfig ( dspi_master_config_t * masterConfig )

The purpose of this API is to get the configuration structure initialized for the DSPI_MasterInit(). User may use the initialized structure unchanged in DSPI_MasterInit() or modify the structure before calling DSPI_MasterInit(). Example:

dspi_master_config_t masterConfig;

DSPI_MasterGetDefaultConfig(&masterConfig);

Parameters

masterConfig pointer to dspi_master_config_t structure

void DSPI_SlaveInit	(	SPI_Type *	base,
		const dspi_slave_config_t *	slaveConfig
	)

This function initializes the DSPI slave configuration. An example use case is as follows:

 dspi_slave_config_t  slaveConfig;
slaveConfig->whichCtar                  = kDSPI_Ctar0;
slaveConfig->ctarConfig.bitsPerFrame    = 8;
slaveConfig->ctarConfig.cpol            = kDSPI_ClockPolarityActiveHigh;
slaveConfig->ctarConfig.cpha            = kDSPI_ClockPhaseFirstEdge;
slaveConfig->enableContinuousSCK        = false;
slaveConfig->enableRxFifoOverWrite      = false;
slaveConfig->enableModifiedTimingFormat = false;
slaveConfig->samplePoint                = kDSPI_SckToSin0Clock;
 DSPI_SlaveInit(base, &slaveConfig);

Parameters

base	DSPI peripheral address.
slaveConfig	Pointer to structure dspi_master_config_t.

void DSPI_SlaveGetDefaultConfig ( dspi_slave_config_t * slaveConfig )

The purpose of this API is to get the configuration structure initialized for the DSPI_SlaveInit(). User may use the initialized structure unchanged in DSPI_SlaveInit(), or modify the structure before calling DSPI_SlaveInit(). Example:

dspi_slave_config_t slaveConfig;

DSPI_SlaveGetDefaultConfig(&slaveConfig);

Parameters

slaveConfig pointer to dspi_slave_config_t structure.

void DSPI_Deinit ( SPI_Type * base )

Call this API to disable the DSPI clock.

Parameters

base	DSPI peripheral address.

static void DSPI_Enable	(	SPI_Type *	base,
		bool	enable
	)

inlinestatic

Parameters

base	DSPI peripheral address.
enable	pass true to enable module, false to disable module.

static uint32_t DSPI_GetStatusFlags ( SPI_Type * base )

inlinestatic

Parameters

base	DSPI peripheral address.

Returns: The DSPI status(in SR register).

static void DSPI_ClearStatusFlags	(	SPI_Type *	base,
		uint32_t	statusFlags
	)

inlinestatic

This function clears the desired status bit by using a write-1-to-clear. The user passes in the base and the desired status bit to clear. The list of status bits is defined in the dspi_status_and_interrupt_request_t. The function uses these bit positions in its algorithm to clear the desired flag state. Example usage:

DSPI_ClearStatusFlags(base, kDSPI_TxCompleteFlag|kDSPI_EndOfQueueFlag);

Parameters

base	DSPI peripheral address.
statusFlags	The status flag , used from type dspi_flags.

< The status flags are cleared by writing 1 (w1c).

void DSPI_EnableInterrupts	(	SPI_Type *	base,
		uint32_t	mask
	)

This function configures the various interrupt masks of the DSPI. The parameters are base and an interrupt mask. Note, for Tx Fill and Rx FIFO drain requests, enable the interrupt request and disable the DMA request.

DSPI_EnableInterrupts(base, kDSPI_TxCompleteInterruptEnable | kDSPI_EndOfQueueInterruptEnable );

Parameters

base	DSPI peripheral address.
mask	The interrupt mask, can use the enum _dspi_interrupt_enable.

static void DSPI_DisableInterrupts	(	SPI_Type *	base,
		uint32_t	mask
	)

inlinestatic

DSPI_DisableInterrupts(base, kDSPI_TxCompleteInterruptEnable | kDSPI_EndOfQueueInterruptEnable );

Parameters

base	DSPI peripheral address.
mask	The interrupt mask, can use the enum _dspi_interrupt_enable.

static void DSPI_EnableDMA	(	SPI_Type *	base,
		uint32_t	mask
	)

inlinestatic

This function configures the Rx and Tx DMA mask of the DSPI. The parameters are base and a DMA mask.

DSPI_EnableDMA(base, kDSPI_TxDmaEnable | kDSPI_RxDmaEnable);

Parameters

base	DSPI peripheral address.
mask	The interrupt mask can use the enum dspi_dma_enable.

static void DSPI_DisableDMA	(	SPI_Type *	base,
		uint32_t	mask
	)

inlinestatic

This function configures the Rx and Tx DMA mask of the DSPI. The parameters are base and a DMA mask.

SPI_DisableDMA(base, kDSPI_TxDmaEnable | kDSPI_RxDmaEnable);

Parameters

base	DSPI peripheral address.
mask	The interrupt mask can use the enum dspi_dma_enable.

static uint32_t DSPI_MasterGetTxRegisterAddress ( SPI_Type * base )

inlinestatic

This function gets the DSPI master PUSHR data register address because this value is needed for the DMA operation.

Parameters

base	DSPI peripheral address.

Returns: The DSPI master PUSHR data register address.

static uint32_t DSPI_SlaveGetTxRegisterAddress ( SPI_Type * base )

inlinestatic

This function gets the DSPI slave PUSHR data register address as this value is needed for the DMA operation.

Parameters

base	DSPI peripheral address.

Returns: The DSPI slave PUSHR data register address.

static uint32_t DSPI_GetRxRegisterAddress ( SPI_Type * base )

inlinestatic

This function gets the DSPI POPR data register address as this value is needed for the DMA operation.

Parameters

base	DSPI peripheral address.

Returns: The DSPI POPR data register address.

static void DSPI_SetMasterSlaveMode	(	SPI_Type *	base,
		dspi_master_slave_mode_t	mode
	)

inlinestatic

Parameters

base	DSPI peripheral address.
mode	Mode setting (master or slave) of type dspi_master_slave_mode_t.

static bool DSPI_IsMaster ( SPI_Type * base )

inlinestatic

Parameters

base	DSPI peripheral address.

Returns: Returns true if the module is in master mode or false if the module is in slave mode.

static void DSPI_StartTransfer ( SPI_Type * base )

inlinestatic

This function sets the module to begin data transfer in either master or slave mode.

Parameters

base	DSPI peripheral address.

static void DSPI_StopTransfer ( SPI_Type * base )

inlinestatic

This function stops data transfers in either master or slave mode.

Parameters

base	DSPI peripheral address.

static void DSPI_SetFifoEnable	(	SPI_Type *	base,
		bool	enableTxFifo,
		bool	enableRxFifo
	)

inlinestatic

This function allows the caller to disable/enable the Tx and Rx FIFOs (independently). Note that to disable, the caller must pass in a logic 0 (false) for the particular FIFO configuration. To enable, the caller must pass in a logic 1 (true).

Parameters

base	DSPI peripheral address.
enableTxFifo	Disables (false) the TX FIFO, else enables (true) the TX FIFO
enableRxFifo	Disables (false) the RX FIFO, else enables (true) the RX FIFO

static void DSPI_FlushFifo	(	SPI_Type *	base,
		bool	flushTxFifo,
		bool	flushRxFifo
	)

inlinestatic

Parameters

base	DSPI peripheral address.
flushTxFifo	Flushes (true) the Tx FIFO, else do not flush (false) the Tx FIFO
flushRxFifo	Flushes (true) the Rx FIFO, else do not flush (false) the Rx FIFO

static void DSPI_SetAllPcsPolarity	(	SPI_Type *	base,
		uint32_t	mask
	)

inlinestatic

For example, PCS0 and PCS1 set to active low and other PCS set to active high. Note that the number of PCSs is specific to the device.

DSPI_SetAllPcsPolarity(base, kDSPI_Pcs0ActiveLow | kDSPI_Pcs1ActiveLow);

Parameters

base	DSPI peripheral address.
mask	The PCS polarity mask , can use the enum _dspi_pcs_polarity.

uint32_t DSPI_MasterSetBaudRate	(	SPI_Type *	base,
		dspi_ctar_selection_t	whichCtar,
		uint32_t	baudRate_Bps,
		uint32_t	srcClock_Hz
	)

This function takes in the desired baudRate_Bps (baud rate) and calculates the nearest possible baud rate without exceeding the desired baud rate, and returns the calculated baud rate in bits-per-second. It requires that the caller also provide the frequency of the module source clock (in Hertz).

Parameters

base	DSPI peripheral address.
whichCtar	The desired Clock and Transfer Attributes Register (CTAR) of the type dspi_ctar_selection_t
baudRate_Bps	The desired baud rate in bits per second
srcClock_Hz	Module source input clock in Hertz

Returns: The actual calculated baud rate

void DSPI_MasterSetDelayScaler	(	SPI_Type *	base,
		dspi_ctar_selection_t	whichCtar,
		uint32_t	prescaler,
		uint32_t	scaler,
		dspi_delay_type_t	whichDelay
	)

This function configures the PCS to SCK delay pre-scalar (PcsSCK) and scalar (CSSCK), after SCK delay pre-scalar (PASC) and scalar (ASC), and the delay after transfer pre-scalar (PDT)and scalar (DT).

These delay names are available in type dspi_delay_type_t.

The user passes the delay to configure along with the prescaler and scaler value. This allows the user to directly set the prescaler/scaler values if they have pre-calculated them or if they simply wish to manually increment either value.

Parameters

base	DSPI peripheral address.
whichCtar	The desired Clock and Transfer Attributes Register (CTAR) of type dspi_ctar_selection_t.
prescaler	The prescaler delay value (can be an integer 0, 1, 2, or 3).
scaler	The scaler delay value (can be any integer between 0 to 15).
whichDelay	The desired delay to configure, must be of type dspi_delay_type_t

uint32_t DSPI_MasterSetDelayTimes	(	SPI_Type *	base,
		dspi_ctar_selection_t	whichCtar,
		dspi_delay_type_t	whichDelay,
		uint32_t	srcClock_Hz,
		uint32_t	delayTimeInNanoSec
	)

This function calculates the values for: PCS to SCK delay pre-scalar (PCSSCK) and scalar (CSSCK), or After SCK delay pre-scalar (PASC) and scalar (ASC), or Delay after transfer pre-scalar (PDT)and scalar (DT).

These delay names are available in type dspi_delay_type_t.

The user passes which delay they want to configure along with the desired delay value in nanoseconds. The function calculates the values needed for the prescaler and scaler and returning the actual calculated delay as an exact delay match may not be possible. In this case, the closest match is calculated without going below the desired delay value input. It is possible to input a very large delay value that exceeds the capability of the part, in which case the maximum supported delay is returned. The higher level peripheral driver alerts the user of an out of range delay input.

Parameters

base	DSPI peripheral address.
whichCtar	The desired Clock and Transfer Attributes Register (CTAR) of type dspi_ctar_selection_t.
whichDelay	The desired delay to configure, must be of type dspi_delay_type_t
srcClock_Hz	Module source input clock in Hertz
delayTimeInNanoSec	The desired delay value in nanoseconds.

Returns: The actual calculated delay value.

static void DSPI_MasterWriteData	(	SPI_Type *	base,
		dspi_command_data_config_t *	command,
		uint16_t	data
	)

inlinestatic

In master mode, the 16-bit data is appended to the 16-bit command info. The command portion provides characteristics of the data such as the optional continuous chip select operation between transfers, the desired Clock and Transfer Attributes register to use for the associated SPI frame, the desired PCS signal to use for the data transfer, whether the current transfer is the last in the queue, and whether to clear the transfer count (normally needed when sending the first frame of a data packet). This is an example:

dspi_command_data_config_t commandConfig;
commandConfig.isPcsContinuous = true;
commandConfig.whichCtar = kDSPICtar0;
commandConfig.whichPcs = kDSPIPcs0;
commandConfig.clearTransferCount = false;
commandConfig.isEndOfQueue = false;
DSPI_MasterWriteData(base, &commandConfig, dataWord);

Parameters

base	DSPI peripheral address.
command	Pointer to command structure.
data	The data word to be sent.

void DSPI_GetDefaultDataCommandConfig ( dspi_command_data_config_t * command )

The purpose of this API is to get the configuration structure initialized for use in the DSPI_MasterWrite_xx(). User may use the initialized structure unchanged in DSPI_MasterWrite_xx() or modify the structure before calling DSPI_MasterWrite_xx(). Example:

dspi_command_data_config_t command;

DSPI_GetDefaultDataCommandConfig(&command);

Parameters

command pointer to dspi_command_data_config_t structure.

void DSPI_MasterWriteDataBlocking	(	SPI_Type *	base,
		dspi_command_data_config_t *	command,
		uint16_t	data
	)

In master mode, the 16-bit data is appended to the 16-bit command info. The command portion provides characteristics of the data such as the optional continuous chip select operation between transfers, the desired Clock and Transfer Attributes register to use for the associated SPI frame, the desired PCS signal to use for the data transfer, whether the current transfer is the last in the queue, and whether to clear the transfer count (normally needed when sending the first frame of a data packet). This is an example:

dspi_command_config_t commandConfig;
commandConfig.isPcsContinuous = true;
commandConfig.whichCtar = kDSPICtar0;
commandConfig.whichPcs = kDSPIPcs1;
commandConfig.clearTransferCount = false;
commandConfig.isEndOfQueue = false;
DSPI_MasterWriteDataBlocking(base, &commandConfig, dataWord);

Note that this function does not return until after the transmit is complete. Also note that the DSPI must be enabled and running to transmit data (MCR[MDIS] & [HALT] = 0). Because the SPI is a synchronous protocol, receive data is available when transmit completes.

Parameters

base	DSPI peripheral address.
command	Pointer to command structure.
data	The data word to be sent.

static uint32_t DSPI_MasterGetFormattedCommand ( dspi_command_data_config_t * command )

inlinestatic

This function allows the caller to pass in the data command structure and returns the command word formatted according to the DSPI PUSHR register bit field placement. The user can then "OR" the returned command word with the desired data to send and use the function DSPI_HAL_WriteCommandDataMastermode or DSPI_HAL_WriteCommandDataMastermodeBlocking to write the entire 32-bit command data word to the PUSHR. This helps improve performance in cases where the command structure is constant. For example, the user calls this function before starting a transfer to generate the command word. When they are ready to transmit the data, they OR this formatted command word with the desired data to transmit. This process increases transmit performance when compared to calling send functions such as DSPI_HAL_WriteDataMastermode which format the command word each time a data word is to be sent.

Parameters

command Pointer to command structure.

Returns: The command word formatted to the PUSHR data register bit field.

void DSPI_MasterWriteCommandDataBlocking	(	SPI_Type *	base,
		uint32_t	data
	)

In this function, the user must append the 16-bit data to the 16-bit command info then provide the total 32-bit word as the data to send. The command portion provides characteristics of the data such as the optional continuous chip select operation between transfers, the desired Clock and Transfer Attributes register to use for the associated SPI frame, the desired PCS signal to use for the data transfer, whether the current transfer is the last in the queue, and whether to clear the transfer count (normally needed when sending the first frame of a data packet). The user is responsible for appending this command with the data to send. This is an example:

dataWord = <16-bit command> | <16-bit data>;

DSPI_HAL_WriteCommandDataMastermodeBlocking(base, dataWord);

Note that this function does not return until after the transmit is complete. Also note that the DSPI must be enabled and running to transmit data (MCR[MDIS] & [HALT] = 0). Because the SPI is a synchronous protocol, the receive data is available when transmit completes.

For a blocking polling transfer, see methods below. Option 1: uint32_t command_to_send = DSPI_MasterGetFormattedCommand(&command); uint32_t data0 = command_to_send | data_need_to_send_0; uint32_t data1 = command_to_send | data_need_to_send_1; uint32_t data2 = command_to_send | data_need_to_send_2;

DSPI_MasterWriteCommandDataBlocking(base,data0); DSPI_MasterWriteCommandDataBlocking(base,data1); DSPI_MasterWriteCommandDataBlocking(base,data2);

Option 2: DSPI_MasterWriteDataBlocking(base,&command,data_need_to_send_0); DSPI_MasterWriteDataBlocking(base,&command,data_need_to_send_1); DSPI_MasterWriteDataBlocking(base,&command,data_need_to_send_2);

Parameters

base	DSPI peripheral address.
data	The data word (command and data combined) to be sent

static void DSPI_SlaveWriteData	(	SPI_Type *	base,
		uint32_t	data
	)

inlinestatic

In slave mode, up to 16-bit words may be written.

Parameters

base	DSPI peripheral address.
data	The data to send.

void DSPI_SlaveWriteDataBlocking	(	SPI_Type *	base,
		uint32_t	data
	)

In slave mode, up to 16-bit words may be written. The function first clears the transmit complete flag, writes data into data register, and finally waits until the data is transmitted.

Parameters

base	DSPI peripheral address.
data	The data to send.

static uint32_t DSPI_ReadData ( SPI_Type * base )

inlinestatic

Parameters

base	DSPI peripheral address.

Returns: The data from the read data buffer.

void DSPI_MasterTransferCreateHandle	(	SPI_Type *	base,
		dspi_master_handle_t *	handle,
		dspi_master_transfer_callback_t	callback,
		void *	userData
	)

This function initializes the DSPI handle which can be used for other DSPI transactional APIs. Usually, for a specified DSPI instance, call this API once to get the initialized handle.

Parameters

base	DSPI peripheral base address.
handle	DSPI handle pointer to dspi_master_handle_t.
callback	dspi callback.
userData	callback function parameter.

status_t DSPI_MasterTransferBlocking	(	SPI_Type *	base,
		dspi_transfer_t *	transfer
	)

This function transfers data with polling. This is a blocking function, which does not return until all transfers have been completed.

Parameters

base	DSPI peripheral base address.
transfer	pointer to dspi_transfer_t structure.

Returns: status of status_t.

status_t DSPI_MasterTransferNonBlocking	(	SPI_Type *	base,
		dspi_master_handle_t *	handle,
		dspi_transfer_t *	transfer
	)

This function transfers data using interrupts. This is a non-blocking function, which returns right away. When all data have been transferred, the callback function is called.

Parameters

base	DSPI peripheral base address.
handle	pointer to dspi_master_handle_t structure which stores the transfer state.
transfer	pointer to dspi_transfer_t structure.

Returns: status of status_t.

status_t DSPI_MasterTransferGetCount	(	SPI_Type *	base,
		dspi_master_handle_t *	handle,
		size_t *	count
	)

This function gets the master transfer count.

Parameters

base	DSPI peripheral base address.
handle	pointer to dspi_master_handle_t structure which stores the transfer state.
count	Number of bytes transferred so far by the non-blocking transaction.

Returns: status of status_t.

void DSPI_MasterTransferAbort	(	SPI_Type *	base,
		dspi_master_handle_t *	handle
	)

This function aborts a transfer using an interrupt.

Parameters

base	DSPI peripheral base address.
handle	pointer to dspi_master_handle_t structure which stores the transfer state.

void DSPI_MasterTransferHandleIRQ	(	SPI_Type *	base,
		dspi_master_handle_t *	handle
	)

This function processes the DSPI transmit and receive IRQ.

Parameters

base	DSPI peripheral base address.
handle	pointer to dspi_master_handle_t structure which stores the transfer state.

void DSPI_SlaveTransferCreateHandle	(	SPI_Type *	base,
		dspi_slave_handle_t *	handle,
		dspi_slave_transfer_callback_t	callback,
		void *	userData
	)

This function initializes the DSPI handle, which can be used for other DSPI transactional APIs. Usually, for a specified DSPI instance, call this API once to get the initialized handle.

Parameters

handle	DSPI handle pointer to dspi_slave_handle_t.
base	DSPI peripheral base address.
callback	DSPI callback.
userData	callback function parameter.

status_t DSPI_SlaveTransferNonBlocking	(	SPI_Type *	base,
		dspi_slave_handle_t *	handle,
		dspi_transfer_t *	transfer
	)

This function transfers data using an interrupt. This is a non-blocking function, which returns right away. When all data have been transferred, the callback function is called.

Parameters

base	DSPI peripheral base address.
handle	pointer to dspi_slave_handle_t structure which stores the transfer state.
transfer	pointer to dspi_transfer_t structure.

Returns: status of status_t.

status_t DSPI_SlaveTransferGetCount	(	SPI_Type *	base,
		dspi_slave_handle_t *	handle,
		size_t *	count
	)

This function gets the slave transfer count.

Parameters

base	DSPI peripheral base address.
handle	pointer to dspi_master_handle_t structure which stores the transfer state.
count	Number of bytes transferred so far by the non-blocking transaction.

Returns: status of status_t.

void DSPI_SlaveTransferAbort	(	SPI_Type *	base,
		dspi_slave_handle_t *	handle
	)

This function aborts transfer using an interrupt.

Parameters

base	DSPI peripheral base address.
handle	pointer to dspi_slave_handle_t structure which stores the transfer state.

void DSPI_SlaveTransferHandleIRQ	(	SPI_Type *	base,
		dspi_slave_handle_t *	handle
	)

This function processes the DSPI transmit and receive IRQ.

Parameters

base	DSPI peripheral base address.
handle	pointer to dspi_slave_handle_t structure which stores the transfer state.

Overview

Typical use case

Master Operation

Slave Operation

Files

Data Structures

Macros

Typedefs

Enumerations

Driver version

Dummy data

Initialization and deinitialization

Status

Interrupts

DMA Control

Bus Operations

Transactional

Data Structure Documentation

Data Fields

Field Documentation

Data Fields

Field Documentation

Data Fields

Field Documentation

Data Fields

Field Documentation

Data Fields

Field Documentation

Data Fields

Field Documentation

Data Fields

Field Documentation

Data Fields

Field Documentation

Macro Definition Documentation

Typedef Documentation

Enumeration Type Documentation

Function Documentation